Searched +full:tad +full:- +full:cnt (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/perf/marvell-cn10k-tad.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Marvell CN10K LLC-TAD performance monitor10 - Bhaskara Budiredla <bbudiredla@marvell.com>13 The Tag-and-Data units (TADs) maintain coherence and contain CN10K14 shared on-chip last level cache (LLC). The tad pmu measures the15 performance of last-level cache. Each tad pmu supports up to eight18 The DT setup comprises of number of tad blocks, the sizes of pmu[all …]
1 /* SPDX-License-Identifier: GPL-2.0-or-later */112 return -ENOSYS; in cpm_muram_alloc()118 return -ENOSYS; in devm_cpm_muram_alloc()128 return -ENOSYS; in cpm_muram_alloc_fixed()135 return -ENOSYS; in devm_cpm_muram_alloc_fixed()145 return -ENOSYS; in cpm_muram_offset()184 static inline int par_io_init(struct device_node *np) { return -ENOSYS; } in par_io_init()185 static inline int par_io_of_config(struct device_node *np) { return -ENOSYS; } in par_io_of_config()187 int assignment, int has_irq) { return -ENOSYS; } in par_io_config_pin()188 static inline int par_io_data_set(u8 port, u8 pin, u8 val) { return -ENOSYS; } in par_io_data_set()[all …]