/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | mediatek,mtk-xhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-xhci.yaml 19 case 2: supports dual-role mode, and the host is based on xHCI driver. 25 - enum: 26 - mediatek,mt2701-xhci 27 - mediatek,mt2712-xhci [all …]
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H A D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-drd.yaml 23 - enum: 24 - mediatek,mt2712-mtu3 25 - mediatek,mt8173-mtu3 26 - mediatek,mt8183-mtu3 27 - mediatek,mt8186-mtu3 [all …]
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H A D | mediatek,mtu3.txt | 4 - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3", 5 soc-model is the name of SoC, such as mt8173, mt2712 etc, 8 - "mediatek,mt8173-mtu3" 9 - reg : specifies physical base address and size of the registers 10 - reg-names: should be "mac" for device IP and "ippc" for IP port control 11 - interrupts : interrupt used by the device IP 12 - power-domains : a phandle to USB power domain node to control USB's 14 - vusb33-supply : regulator of USB avdd3.3v 15 - clocks : a list of phandle + clock-specifier pairs, one for each 16 entry in clock-names [all …]
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H A D | mediatek,mtk-xhci.txt | 6 the second one supports dual-role mode, and the host is based on xHCI 11 ------------------------------------------------------------------------ 14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci", 15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using 16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in 18 - "mediatek,mt8173-xhci" 19 - reg : specifies physical base address and size of the registers 20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control 21 - interrupts : interrupt used by the controller 22 - power-domains : a phandle to USB power domain node to control USB's [all …]
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H A D | faraday,fotg210.txt | 3 This OTG-capable USB host controller is found in Cortina Systems 7 - compatible: should be one of: 9 "cortina,gemini-usb", "faraday,fotg210" 10 - reg: should contain one register range i.e. start and length 11 - interrupts: description of the interrupt line 14 - clocks: should contain the IP block clock 15 - clock-names: should be "PCLK" for the IP block clock 17 Required properties for "cortina,gemini-usb" compatible: 18 - syscon: a phandle to the system controller to access PHY registers 20 Optional properties for "cortina,gemini-usb" compatible: [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am62a-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Device Tree Source for AM62A SoC Family Wakeup Domain peripherals 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "simple-bus"; 11 #address-cells = <1>; 12 #size-cells = <1>; 16 compatible = "ti,am654-chipid"; 20 cpsw_mac_syscon: ethernet-mac-syscon@200 { 21 compatible = "ti,am62p-cpsw-mac-efuse", "syscon"; 25 usb0_phy_ctrl: syscon@4008 { [all …]
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H A D | k3-am62-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 11 wkup_conf: syscon@43000000 { 12 bootph-all; 13 compatible = "syscon", "simple-mfd"; 15 #address-cells = <1>; 16 #size-cells = <1>; 20 bootph-all; [all …]
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H A D | k3-am62p-j722s-common-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Device Tree file for the WAKEUP domain peripherals shared by AM62P and J722S 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "simple-bus"; 12 #address-cells = <1>; 13 #size-cells = <1>; 15 bootph-all; 18 compatible = "ti,am654-chipid"; 20 bootph-all; 23 cpsw_mac_syscon: ethernet-mac-syscon@200 { [all …]
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H A D | k3-am62p-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Device Tree file for the AM62P wakeup domain peripherals 4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 compatible = "simple-bus"; 11 #address-cells = <1>; 12 #size-cells = <1>; 14 bootph-all; 17 compatible = "ti,am654-chipid"; 19 bootph-all; 22 usb0_phy_ctrl: syscon@4008 { [all …]
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/freebsd/sys/contrib/device-tree/Bindings/crypto/ |
H A D | fsl,sec-v4.0-mon.yaml | 1 # SPDX-License-Identifier: GPL-2.0 2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc. 4 --- 5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0-mon.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Freescale Secure Non-Volatile Storage (SNVS) 11 - '"Horia Geantă" <horia.geanta@nxp.com>' 12 - Pankaj Gupta <pankaj.gupta@nxp.com> 13 - Gaurav Jain <gaurav.jain@nxp.com> 23 - items: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | brcm,brcmstb-usb-phy.txt | 4 - compatible: should be one of 5 "brcm,brcmstb-usb-phy" 6 "brcm,bcm7216-usb-phy" 7 "brcm,bcm7211-usb-phy" 9 - reg and reg-names properties requirements are specific to the 11 "brcm,brcmstb-usb-phy": 12 - reg: 1 or 2 offset and length pairs. One for the base CTRL registers 14 - reg-names: not specified 15 "brcm,bcm7216-usb-phy": 16 - reg: 3 offset and length pairs for CTRL, XHCI_EC and XHCI_GBL [all …]
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H A D | ti,omap-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Kishon Vijay Abraham I <kishon@ti.com> 11 - Roger Quadros <rogerq@kernel.org> 16 - items: 17 - enum: 18 - ti,dra7x-usb2 19 - ti,dra7x-usb2-phy2 [all …]
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H A D | ti-phy.txt | 6 - compatible: Should be one of 7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4. 8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register 10 "ti,control-phy-pipe3" - i [all...] |
/freebsd/sys/contrib/device-tree/src/arm/cirrus/ |
H A D | ep93xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/leds/common.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/clock/cirrus,ep9301-syscon.h> 11 compatible = "simple-bus"; 13 #address-cells = <1>; 14 #size-cells = <1>; 16 syscon: syscon@80930000 { label 17 compatible = "cirrus,ep9301-syscon", "syscon"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/ |
H A D | qcom,rpm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Bjorn Andersson <andersson@kernel.org> 21 - qcom,rpm-apq8064 22 - qcom,rpm-msm8660 23 - qcom,rpm-msm8960 24 - qcom,rpm-ipq8064 25 - qcom,rpm-mdm9615 33 interrupt-names: [all …]
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/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/ |
H A D | intel-ixp42x-freecom-fsg-3.dts | 1 // SPDX-License-Identifier: ISC 3 * Device Tree file for the Freecom FSG-3 router. 8 /dts-v1/; 10 #include "intel-ixp42x.dtsi" 11 #include <dt-bindings/input/input.h> 14 model = "Freecom FSG-3"; 15 compatible = "freecom,fsg-3", "intel,ixp42x"; 16 #address-cells = <1>; 17 #size-cell [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynosautov920.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/samsung,exynosautov920.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/samsung,exynos-usi.h> 15 #address-cells = <2>; 16 #size-cells = <1>; 18 interrupt-parent = <&gic>; 31 arm-pmu { 32 compatible = "arm,cortex-a78-pmu"; 37 compatible = "fixed-clock"; [all …]
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H A D | exynos850.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <dt-bindings/clock/exynos850.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/soc/samsung,exynos-usi.h> 20 #address-cells = <2>; 21 #size-cells = <1>; 23 interrupt-parent = <&gic>; 34 arm-pmu { 35 compatible = "arm,cortex-a55-pmu"; 44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/power/reset/ |
H A D | atmel,sama5d2-shdwc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Claudiu Beznea <claudiu.beznea@microchip.com> 14 and VDDCORE and the wake-up detection on debounced input lines. 19 - items: 20 - const: microchip,sama7g5-shdwc 21 - const: syscon 22 - enum: [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt7981b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 #include <dt-bindings/clock/mediatek,mt7981-clk.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/reset/mt7986-resets.h> 9 interrupt-parent = <&gic>; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 18 compatible = "arm,cortex-a53"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/google/ |
H A D | gs101.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright 2019-2023 Google LLC 6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org> 9 #include <dt-bindings/clock/google,gs101.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/soc/samsung,exynos-usi.h> 16 #address-cells = <2>; 17 #size-cells = <1>; 19 interrupt-parent = <&gic>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/gemini/ |
H A D | gemini-nas4220b.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree file for the Gemini-based Raidsonic NAS IB-4220-B 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 12 model = "Raidsonic NAS IB-4220-B"; 13 compatible = "raidsonic,ib-4220-b", "cortina,gemini"; 14 #address-cells = <1>; 15 #size-cells = <1>; 24 stdout-path = &uart0; 28 compatible = "gpio-keys"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | exynos5410.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <dt-bindings/clock/exynos5410.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 20 interrupt-parent = <&gic>; 30 #address-cells = <1>; 31 #size-cells = <0>; 35 compatible = "arm,cortex-a15"; 37 clock-frequency = <1600000000>; 42 compatible = "arm,cortex-a15"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/microchip/ |
H A D | at91sam9260ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 17 stdout-path = &dbgu; 26 clock-frequency = <32768>; 30 clock-frequency = <18432000>; 38 compatible = "atmel,tcb-timer"; 43 compatible = "atmel,tcb-timer"; 49 atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>; 54 pinctrl-0 = < [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/marvell/ |
H A D | cp110-system-controller.txt | 6 giving access to numerous features: clocks, pin-muxing and many other 11 - compatible: must be: "syscon", "simple-mfd"; 12 - reg: register area of the CP110 system controller 18 ----- [all...] |