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/linux/Documentation/devicetree/bindings/power/reset/
H A Dsyscon-reboot-mode.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot-mode.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic SYSCON reboot mode driver
10 - Sebastian Reichel <sre@kernel.org>
13 This driver gets reboot mode magic value from reboot-mode driver
14 and stores it in a SYSCON mapped register. Then the bootloader
16 value stored. The SYSCON mapped register is retrieved from the
17 parental dt-node plus the offset. So the SYSCON reboot-mode node
[all …]
/linux/Documentation/devicetree/bindings/soc/loongson/
H A Dloongson,ls2k-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/loongson/loongson,ls2k-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 Power Manager controller
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
15 - items:
16 - const: loongson,ls2k0500-pmc
17 - const: syscon
18 - items:
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/linux/Documentation/devicetree/bindings/soc/fsl/
H A Dfsl,ls1028a-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/fsl,ls1028a-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
18 pattern: "^syscon@[0-9a-f]+$"
22 - enum:
23 - fsl,ls1028a-reset
24 - const: syscon
25 - const: simple-mfd
[all …]
/linux/drivers/power/reset/
H A Dsyscon-reboot-mode.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/reboot.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/reboot-mode.h>
18 struct reboot_mode_driver reboot; member
23 static int syscon_reboot_mode_write(struct reboot_mode_driver *reboot, in syscon_reboot_mode_write() argument
29 syscon_rbm = container_of(reboot, struct syscon_reboot_mode, reboot); in syscon_reboot_mode_write()
31 ret = regmap_update_bits(syscon_rbm->map, syscon_rbm->offset, in syscon_reboot_mode_write()
32 syscon_rbm->mask, magic); in syscon_reboot_mode_write()
34 dev_err(reboot->dev, "update reboot mode bits failed\n"); in syscon_reboot_mode_write()
[all …]
H A Dsyscon-reboot.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Generic Syscon Reboot Driver
11 #include <linux/mfd/syscon.h>
14 #include <linux/reboot.h>
46 if (ctx->rd) { in syscon_restart_handle()
47 if (mode < ARRAY_SIZE(ctx->rd->mode_bits) && in syscon_restart_handle()
48 ctx->rd->mode_bits[mode].valid) in syscon_restart_handle()
49 mode_bits = &ctx->rd->mode_bits[mode]; in syscon_restart_handle()
51 mode_bits = &ctx->rd->catchall; in syscon_restart_handle()
53 mode_bits = &ctx->catchall; in syscon_restart_handle()
[all …]
H A Dbrcmstb-reboot.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <linux/reboot.h>
19 #include <linux/mfd/syscon.h>
37 rc = regmap_write(regmap, rst_src_en, reset_masks->rst_src_en_mask); in brcmstb_restart_handler()
49 rc = regmap_write(regmap, sw_mstr_rst, reset_masks->sw_mstr_rst_mask); in brcmstb_restart_handler()
77 struct device_node *np = pdev->dev.of_node; in brcmstb_reboot_probe()
80 reset_masks = device_get_match_data(&pdev->dev); in brcmstb_reboot_probe()
83 return -EINVAL; in brcmstb_reboot_probe()
86 regmap = syscon_regmap_lookup_by_phandle_args(np, "syscon", ARRAY_SIZE(args), args); in brcmstb_reboot_probe()
88 pr_err("failed to get syscon phandle\n"); in brcmstb_reboot_probe()
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H A Darm-versatile-reboot.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/mfd/syscon.h>
9 #include <linux/reboot.h>
24 * We detect the different syscon types from the compatible strings.
42 .compatible = "arm,core-module-integrator",
46 .compatible = "arm,core-module-versatile",
50 .compatible = "arm,realview-eb-syscon",
54 .compatible = "arm,realview-pb1176-syscon",
58 .compatible = "arm,realview-pb11mp-syscon",
62 .compatible = "arm,realview-pba8-syscon",
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H A Daxxia-reset.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/mfd/syscon.h>
16 #include <linux/reboot.h>
31 struct regmap *syscon = data->cb_data; in axxia_restart_handler() local
34 regmap_write(syscon, SC_CRIT_WRITE_KEY, 0xab); in axxia_restart_handler()
36 regmap_write(syscon, SC_LATCH_ON_RESET, 0x00000040); in axxia_restart_handler()
38 regmap_write(syscon, SC_EFUSE_INT_STATUS, EFUSE_READ_DONE); in axxia_restart_handler()
40 regmap_update_bits(syscon, SC_RESET_CONTROL, in axxia_restart_handler()
48 struct device *dev = &pdev->dev; in axxia_reset_probe()
49 struct regmap *syscon; in axxia_reset_probe() local
[all …]
H A Docelot-reset.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
12 #include <linux/mfd/syscon.h>
15 #include <linux/reboot.h>
19 const char *syscon; member
48 u32 if_si_owner_bit = ctx->props->if_si_owner_bit; in ocelot_restart_handle()
51 regmap_update_bits(ctx->cpu_ctrl, ctx->props->protect_reg, in ocelot_restart_handle()
52 ctx->props->vcore_protect, 0); in ocelot_restart_handle()
56 regmap_update_bits(ctx->cpu_ctrl, in ocelot_restart_handle()
63 writel(SOFT_CHIP_RST, ctx->base); in ocelot_restart_handle()
72 struct device *dev = &pdev->dev; in ocelot_reset_probe()
[all …]
H A Dsyscon-poweroff.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Generic Syscon Poweroff Driver
12 #include <linux/mfd/syscon.h>
16 #include <linux/reboot.h>
28 struct syscon_poweroff_data *data = off_data->cb_data; in syscon_poweroff()
31 regmap_update_bits(data->map, data->offset, data->mask, data->value); in syscon_poweroff()
42 struct device *dev = &pdev->dev; in syscon_poweroff_probe()
48 return -ENOMEM; in syscon_poweroff_probe()
50 data->map = syscon_regmap_lookup_by_phandle(dev->of_node, "regmap"); in syscon_poweroff_probe()
51 if (IS_ERR(data->map)) { in syscon_poweroff_probe()
[all …]
/linux/Documentation/devicetree/bindings/arm/bcm/
H A Dbrcm,bcm63138.txt1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2 -----------------------------------------------------------
4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14 'enable-method' property.
17 - compatible: should be "brcm,bcm63138-bootlut"
18 - reg: register base address and length for the Boot Lookup table
21 - enable-method: should be "brcm,bcm63138"
24 - enable-method: should be "brcm,bcm63138"
25 - resets: phandle to the relevant PMB controller, one integer indicating the internal
[all …]
H A Dbrcm,brcmstb.txt2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
22 "syscon"
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos-syscon-restart.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos SoC syscon reboot/poweroff nodes common definition.
7 poweroff: syscon-poweroff {
8 compatible = "syscon-poweroff";
14 reboot: syscon-reboot { label
15 compatible = "syscon-reboot";
/linux/Documentation/devicetree/bindings/mfd/
H A Dti,nspire-misc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mfd/ti,nspire-misc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Davis <afd@ti.com>
22 - enum:
23 - ti,nspire-misc
24 - const: syscon
25 - const: simple-mfd
[all …]
/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dsysctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wei Xu <xuwei5@hisilicon.com>
14 used to assist the slave core startup, reboot the system, etc.
23 Hisilicon system controller --> hisilicon,sysctrl
24 HiP01 system controller --> hisilicon,hip01-sysctrl
25 Hi6220 system controller --> hisilicon,hi6220-sysctrl
26 Hi3519 system controller --> hisilicon,hi3519-sysctrl
29 - if:
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/linux/Documentation/devicetree/bindings/net/
H A Drealtek,rtl9301-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/realtek,rtl9301-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
15 represented here as a syscon node.
17 $ref: ethernet-switch.yaml#/$defs/ethernet-ports
22 - enum:
23 - realtek,rtl9301-switch
24 - realtek,rtl9302b-switch
[all …]
/linux/arch/mips/boot/dts/brcm/
H A Dbcm3368.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm3368-clock.h"
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
14 mips-hpt-frequency = <150000000>;
30 periph_clk: periph-clk {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
[all …]
H A Dbcm63268.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm63268-clock.h"
4 #include "dt-bindings/reset/bcm63268-reset.h"
5 #include "dt-bindings/soc/bcm63268-pm.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
13 #address-cells = <1>;
14 #size-cells = <0>;
16 mips-hpt-frequency = <200000000>;
32 periph_osc: periph-osc {
[all …]
/linux/Documentation/devicetree/bindings/mips/lantiq/
H A Drcu.txt5 where each sub-device has its own set of registers.
11 syscon.
14 -------------------------------------------------------------------------------
16 - compatible : The first and second values must be:
17 "lantiq,xrx200-rcu", "simple-mfd", "syscon"
18 - reg : The address and length of the system control registers
21 -------------------------------------------------------------------------------
24 compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
27 big-endian;
29 reset0: reset-controller@10 {
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos990.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
8 #include <dt-bindings/clock/samsung,exynos990.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <1>;
16 interrupt-parent = <&gic>;
29 #address-cells = <1>;
30 #size-cells = <0>;
32 cpu-map {
74 compatible = "arm,cortex-a55";
[all …]
/linux/arch/mips/boot/dts/img/
H A Dboston.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/boston-clock.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/mips-gic.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 stdout-path = "uart0:115200";
23 #address-cells = <1>;
[all …]
/linux/arch/powerpc/boot/dts/
H A Dturris1x.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
41 gpio-controller@18 {
45 #gpio-cells = <2>;
46 gpio-controller;
[all …]
/linux/arch/arm/boot/dts/gemini/
H A Dgemini.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/clock/cortina,gemini-clock.h>
8 #include <dt-bindings/reset/cortina,gemini-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 compatible = "simple-bus";
17 interrupt-parent = <&intcon>;
20 compatible = "cortina,gemini-flash", "cfi-flash";
[all …]
/linux/arch/mips/boot/dts/mti/
H A Dmalta.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/mips-gic.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 cpu_intc: interrupt-controller {
17 compatible = "mti,cpu-interrupt-controller";
19 interrupt-controller;
20 #interrupt-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/sigmastar/
H A Dmstar-v7.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mstar-msc313-mpll.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
[all …]

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