/freebsd/sys/contrib/device-tree/Bindings/power/reset/ |
H A D | syscon-reboot.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic SYSCON mapped register reset driver 10 - Sebastian Reichel <sre@kernel.org> 13 This is a generic reset driver using syscon to map the reset register. 15 defined by the SYSCON register map base plus the offset with the value and 16 mask defined in the reboot node. Default will be little endian mode, 32 bit 17 access only. The SYSCON registers map is normally retrieved from the [all …]
|
H A D | syscon-reboot-mode.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot [all...] |
/freebsd/sys/dev/syscon/ |
H A D | syscon_power.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 29 * Driver for simple syscon poweroff and reset devices. The device tree 32 * https://www.kernel.org/doc/Documentation/devicetree/bindings/power/reset/syscon-poweroff.txt 33 * https://www.kernel.org/doc/Documentation/devicetree/bindings/power/reset/syscon-reboot.txt 42 #include <sys/reboot.h> 51 #include "syscon.h" 54 struct syscon *regmap; 58 bool reboot; member 69 if (sc->reboot) in syscon_power_shutdown_final() [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | canaan,k210-sysctl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Damien Le Moal <dlemoal@kernel.org> 20 - const: canaan,k210-sysctl 21 - const: syscon 22 - const: simple-mfd 29 clock-names: 31 - const: pclk [all …]
|
H A D | ti,nspire-misc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/mfd/ti,nspire-misc.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Andrew Davis <afd@ti.com> 22 - enum: 23 - ti,nspire-misc 24 - const: syscon 25 - const: simple-mfd [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/ |
H A D | fsl,ls1028a-reset.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas//soc/fsl/fsl,ls1028a-reset.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Li 18 pattern: "^syscon@[0-9a-f]+$" 22 - enum: 23 - fsl,ls1028a-reset 24 - const: syscon 25 - const: simple-mfd [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/arm/bcm/ |
H A D | brcm,bcm63138.txt | 1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings 2 ----------------------------------------------------------- 4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the 13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an 14 'enable-method' property. 17 - compatible: should be "brcm,bcm63138-bootlut" 18 - reg: register base address and length for the Boot Lookup table 21 - enable-method: should be "brcm,bcm63138" 24 - enable-method: should be "brcm,bcm63138" 25 - resets: phandle to the relevant PMB controller, one integer indicating the internal [all …]
|
H A D | brcm,brcmstb.txt | 2 ----------------------------------------------- 3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants) 7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb" 11 #address-cells = <2>; 12 #size-cells = <2>; 16 Further, syscon nodes that map platform-specific registers used for general 19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon" 20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl", 21 "brcm,brcmstb-cpu-biu-ctrl", 22 "syscon" [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | exynos-syscon-restart.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos SoC syscon reboot/poweroff nodes common definition. 7 poweroff: syscon-poweroff { 8 compatible = "syscon-poweroff"; 14 reboot: syscon-reboot { label 15 compatible = "syscon-reboot";
|
/freebsd/sys/contrib/device-tree/Bindings/soc/samsung/ |
H A D | exynos-pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 12 # Custom select to avoid matching all nodes with 'syscon' [all...] |
/freebsd/sys/contrib/device-tree/Bindings/arm/hisilicon/controller/ |
H A D | sysctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
/freebsd/sys/contrib/device-tree/Bindings/arm/samsung/ |
H A D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 12 # Custom select to avoid matching all nodes with 'syscon' 18 - samsung,exynos3250-pmu 19 - samsung,exynos4210-pmu 20 - samsung,exynos4412-pmu 21 - samsung,exynos5250-pmu 22 - samsung,exynos5260-pmu [all …]
|
/freebsd/sys/contrib/device-tree/src/mips/brcm/ |
H A D | bcm3368.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm3368-clock.h" 6 #address-cells = <1>; 7 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 14 mips-hpt-frequency = <150000000>; 30 periph_clk: periph-clk { 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; [all …]
|
H A D | bcm6358.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm6358-clock.h" 4 #include "dt-bindings/reset/bcm6358-reset.h" 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 15 mips-hpt-frequency = <150000000>; 31 periph_osc: periph-osc { 32 compatible = "fixed-clock"; [all …]
|
H A D | bcm63268.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm63268-clock.h" 4 #include "dt-bindings/reset/bcm63268-reset.h" 5 #include "dt-bindings/soc/bcm63268-pm.h" 8 #address-cells = <1>; 9 #size-cells = <1>; 13 #address-cells = <1>; 14 #size-cells = <0>; 16 mips-hpt-frequency = <200000000>; 32 periph_osc: periph-osc { [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/arm/hisilicon/ |
H A D | hisilicon.txt | 2 ---------------------------------------------------- 5 - compatible = "hisilicon,hi3660"; 9 - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; 13 - compatible = "hisilicon,hi3670"; 17 - compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670"; 21 - compatible = "hisilicon,hi3798cv200"; 25 - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200"; 29 - compatible = "hisilicon,hi3620-hi4511"; 33 - compatible = "hisilicon,hi6220"; 37 - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/sram/ |
H A D | qcom,imem.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 19 - enum: 20 - qcom,apq8064-imem 21 - qcom,msm8226-imem 22 - qcom,msm8974-imem 23 - qcom,qcs404-imem 24 - qcom,qdu1000-imem [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/mips/lantiq/ |
H A D | rcu.txt | 5 where each sub-device has its own set of registers. 11 syscon. 14 ------------------------------------------------------------------------------- 16 - compatible : The first and second values must be: 17 "lantiq,xrx200-rcu", "simple-mfd", "syscon" 18 - reg : The address and length of the system control registers 21 ------------------------------------------------------------------------------- 24 compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon"; 27 big-endian; 29 reset0: reset-controller@10 { [all …]
|
/freebsd/sys/contrib/device-tree/src/mips/img/ |
H A D | boston.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/clock/boston-clock.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/mips-gic.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 15 stdout-path = "uart0:115200"; 23 #address-cells = <1>; [all …]
|
/freebsd/sys/contrib/device-tree/src/powerpc/ |
H A D | turris1x.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/) 8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/ 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/leds/common.h> 14 /include/ "fsl/p2020si-pre.dtsi" 41 gpio-controller@18 { 45 #gpio-cells = <2>; 46 gpio-controller; [all …]
|
/freebsd/sys/contrib/device-tree/src/mips/mti/ |
H A D | malta.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/mips-gic.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 cpu_intc: interrupt-controller { 17 compatible = "mti,cpu-interrupt-controller"; 19 interrupt-controller; 20 #interrupt-cells = <1>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/gemini/ |
H A D | gemini.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/clock/cortina,gemini-clock.h> 8 #include <dt-bindings/reset/cortina,gemini-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 16 compatible = "simple-bus"; 17 interrupt-parent = <&intcon>; 20 compatible = "cortina,gemini-flash", "cfi-flash"; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
H A D | bcm7445.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #address-cells = <2>; 6 #size-cells = <2>; 9 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "brcm,brahma-b15"; 22 enable-method = "brcm,brahma-b15"; 27 compatible = "brcm,brahma-b15"; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/sigmastar/ |
H A D | mstar-v7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/mstar-msc313-mpll.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a7"; [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/soc/rockchip/ |
H A D | grf.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - items: 16 - enum: 17 - rockchip,rk3288-sgrf 18 - rockchip,rk3566-pipe-grf 19 - rockchip,rk3568-pcie3-phy-grf 20 - rockchip,rk3568-pipe-grf [all …]
|