/linux/drivers/mfd/ |
H A D | syscon.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 12 #include <linux/clk.h> 21 #include <linux/mfd/syscon.h> 27 struct syscon { struct 40 static struct syscon *of_syscon_register(struct device_node *np, bool check_res) in of_syscon_register() argument 42 struct clk *clk; in of_syscon_register() local 53 struct syscon *syscon __free(kfree) = kzalloc(sizeof(*syscon), GFP_KERNEL); in of_syscon_register() 54 if (!syscon) in of_syscon_register() 55 return ERR_PTR(-ENOMEM); in of_syscon_register() 58 return ERR_PTR(-ENOMEM); in of_syscon_register() [all …]
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/linux/drivers/clk/nxp/ |
H A D | clk-lpc18xx-creg.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Clk driver for NXP LPC18xx/43xx Configuration Registers (CREG) 8 #include <linux/clk-provider.h> 11 #include <linux/mfd/syscon.h> 50 ret = regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_32k_prepare() 67 regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_32k_unprepare() 77 regmap_read(creg->reg, LPC18XX_CREG_CREG0, ®); in clk_creg_32k_is_prepared() 93 return regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_enable() 94 creg->en_mask, creg->en_mask); in clk_creg_enable() 101 regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_disable() [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | sprd,sc9860-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/sprd,sc9860-clk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Orson Zhai <orsonzhai@gmail.com> 11 - Baolin Wang <baolin.wang7@gmail.com> 12 - Chunyan Zhang <zhang.lyra@gmail.com> 17 - sprd,sc9860-agcp-gate 18 - sprd,sc9860-aonsecure-clk 19 - sprd,sc9860-aon-gate [all …]
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H A D | pistachio-clock.txt | 6 from the device-tree. 9 ---------------- 12 defined with the following clock-output-names: 13 - "xtal": External 52Mhz oscillator (required) 14 - "audio_clk_in": Alternate audio reference clock (optional) 15 - "enet_clk_in": Alternate ethernet PHY clock (optional) 18 ---------------------- 21 co-processor), audio, and several peripherals. 24 - compatible: Must be "img,pistachio-clk". 25 - reg: Must contain the base address and length of the core clock controller. [all …]
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H A D | sprd,sc9863a-clk.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Orson Zhai <orsonzhai@gmail.com> 12 - Baolin Wang <baolin.wang7@gmail.com> 13 - Chunyan Zhang <zhang.lyra@gmail.com> 16 "#clock-cells": 21 - sprd,sc9863a-ap-clk 22 - sprd,sc9863a-aon-clk [all …]
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H A D | lpc1850-creg-clk.txt | 13 Documentation/devicetree/bindings/clock/clock-bindings.txt 16 - compatible: 17 Should be "nxp,lpc1850-creg-clk" 18 - #clock-cells: 20 - clocks: 23 The creg-clk node must be a child of the creg syscon node. 33 creg: syscon@40043000 { 34 compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd"; 37 creg_clk: clock-controller { 38 compatible = "nxp,lpc1850-creg-clk"; [all …]
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/linux/drivers/spi/ |
H A D | spi-dw-mmio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Memory-mapped interface driver for DW SPI Core 8 #include <linux/clk.h> 15 #include <linux/mfd/syscon.h> 24 #include "spi-dw.h" 30 struct clk *clk; member 31 struct clk *pclk; 52 struct regmap *syscon; member 61 * bit: |---3-------2-------1-------0 79 struct dw_spi *dws = spi_controller_get_devdata(spi->controller); in dw_spi_mscc_set_cs() [all …]
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H A D | spi-clps711x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2012-2016 Alexander Shiyan <shc_work@mail.ru> 9 #include <linux/clk.h> 16 #include <linux/mfd/syscon.h> 17 #include <linux/mfd/syscon/clps711x.h> 20 #define DRIVER_NAME "clps711x-spi" 27 struct regmap *syscon; member 28 struct clk *spi_clk; 40 struct spi_device *spi = msg->spi; in spi_clps711x_prepare_message() 43 return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN, in spi_clps711x_prepare_message() [all …]
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/linux/arch/arm64/boot/dts/sprd/ |
H A D | ums512.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/sprd,ums512-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <2>; 18 #size-cells = <0>; 20 cpu-map { 51 compatible = "arm,cortex-a55"; [all …]
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/linux/drivers/clk/versatile/ |
H A D | clk-icst.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * Copyright (C) 2012-2015 Linus Walleij 17 #include <linux/clk-provider.h> 20 #include <linux/mfd/syscon.h> 23 #include "clk-icst.h" 37 * struct clk_icst - ICST VCO clock wrapper 59 * vco_get() - get ICST VCO settings from a certain ICST 68 ret = regmap_read(icst->map, icst->vcoreg_off, &val); in vco_get() 77 * "Integrator CM926EJ-S, CM946E-S, CM966E-S, CM1026EJ-S and in vco_get() 78 * CM1136JF-S User Guide" ARM DUI 0138E, page 3-13 thru 3-14. in vco_get() [all …]
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H A D | clk-impd1.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Clock driver for the ARM Integrator/IM-PD1 board 4 * Copyright (C) 2012-2013 Linus Walleij 6 #include <linux/clk-provider.h> 12 #include <linux/mfd/syscon.h> 16 #include "clk-icst.h" 23 * There are two VCO's on the IM-PD1 67 struct clk *clk = ERR_PTR(-EINVAL); in integrator_impd1_clk_spawn() local 68 const char *name = np->name; in integrator_impd1_clk_spawn() 75 pr_err("no regmap for syscon IM-PD1 ICST clock parent\n"); in integrator_impd1_clk_spawn() [all …]
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/linux/drivers/video/fbdev/ |
H A D | clps711x-fb.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 #include <linux/clk.h> 17 #include <linux/mfd/syscon.h> 18 #include <linux/mfd/syscon/clps711x.h> 22 #define CLPS711X_FB_NAME "clps711x-fb" 34 struct clk *clk; member 36 struct regmap *syscon; member 47 struct clps711x_fb_info *cfb = info->par; in clps711x_fb_setcolreg() 50 if (regno >= BIT(info->var.bits_per_pixel)) in clps711x_fb_setcolreg() 51 return -EINVAL; in clps711x_fb_setcolreg() [all …]
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/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt2701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt2701-clk.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/mt2701-power.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/memory/mt2701-larb-port.h> 14 #include <dt-bindings/reset/mt2701-resets.h> 15 #include "mt2701-pinfunc.h" 18 #address-cells = <2>; [all …]
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H A D | mt7629.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/mt7629-clk.h> 11 #include <dt-bindings/power/mt7622-power.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/reset/mt7629-resets.h> 18 interrupt-parent = <&sysirq>; 19 #address-cells = <1>; [all …]
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/linux/drivers/net/can/c_can/ |
H A D | c_can_platform.c | 9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de> 10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch> 34 #include <linux/clk.h> 36 #include <linux/mfd/syscon.h> 47 /* 16-bit c_can registers can be arranged differently in the memory 48 * architecture of different implementations. For example: 16-bit 49 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc. 55 return readw(priv->base + priv->regs[index]); in c_can_plat_read_reg_aligned_to_16bit() 61 writew(val, priv->base + priv->regs[index]); in c_can_plat_write_reg_aligned_to_16bit() 67 return readw(priv->base + 2 * priv->regs[index]); in c_can_plat_read_reg_aligned_to_32bit() [all …]
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/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt2712e.dtsi | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt2712-clk.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/memory/mt2712-larb-port.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt2712-power.h> 14 #include "mt2712-pinfunc.h" 18 interrupt-parent = <&sysirq>; 19 #address-cells = <2>; [all …]
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H A D | mt7986a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/mt7986-clk.h> 10 #include <dt-bindings/reset/mt7986-resets.h> 11 #include <dt-bindings/phy/phy.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 #address-cells = <1>; [all …]
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/linux/arch/arm64/boot/dts/nuvoton/ |
H A D | nuvoton-common-npcm8xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/clock/nuvoton,npcm845-clk.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 interrupt-parent = <&gic>; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 compatible = "simple-bus"; [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | starfive,jh7110-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Emil Renner Berthing <kernel@esmil.dk> 12 - Samin Guo <samin.guo@starfivetech.com> 19 - starfive,jh7100-dwmac 20 - starfive,jh7110-dwmac 22 - compatible 27 - items: [all …]
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | fsl,imx8qxp-csr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/fsl,imx8qxp-csr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liu Ying <victor.liu@nxp.com> 17 use-case is for some other nodes to acquire a reference to the syscon node 18 by phandle, and the other typical use-case is that the operating system 23 pattern: "^syscon@[0-9a-f]+$" 27 - enum: 28 - fsl,imx8qxp-mipi-lvds-csr [all …]
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/linux/Documentation/devicetree/bindings/soc/imx/ |
H A D | fsl,imx93-media-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX93 Media blk-ctrl 10 - Peng Fan <peng.fan@nxp.com> 15 clocking, reset, and miscellaneous top-level controls for peripherals 21 - const: fsl,imx93-media-blk-ctrl 22 - const: syscon 27 '#power-domain-cells': [all …]
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H A D | fsl,imx8mn-disp-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MN DISP blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to 20 - const: fsl,imx8mn-disp-blk-ctrl 21 - const: syscon 26 '#power-domain-cells': [all …]
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/linux/Documentation/devicetree/bindings/arm/mediatek/ |
H A D | mediatek,g3dsys.txt | 9 - compatible: Should be: 10 - "mediatek,mt2701-g3dsys", "syscon": 12 - "mediatek,mt7623-g3dsys", "mediatek,mt2701-g3dsys", "syscon": 14 - #clock-cells: Must be 1 15 - #reset-cells: Must be 1 17 The g3dsys controller uses the common clk binding from 18 Documentation/devicetree/bindings/clock/clock-bindings.txt 19 The available clocks are defined in dt-bindings/clock/mt*-clk.h. 23 g3dsys: clock-controller@13000000 { 24 compatible = "mediatek,mt7623-g3dsys", [all …]
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | mixel,mipi-dsi-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Guido Günther <agx@sigxcpu.org> 13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the 14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the 18 in either MIPI-DSI PHY mode or LVDS PHY mode. 23 - fsl,imx8mq-mipi-dphy 24 - fsl,imx8qxp-mipi-dphy [all …]
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/linux/drivers/iio/adc/ |
H A D | aspeed_adc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 15 #include <linux/clk.h> 16 #include <linux/clk-provider.h> 29 #include <linux/mfd/syscon.h> 177 struct device_node *syscon; in aspeed_adc_set_trim_data() local 182 syscon = of_find_node_by_name(NULL, "syscon"); in aspeed_adc_set_trim_data() 183 if (syscon == NULL) { in aspeed_adc_set_trim_data() 184 dev_warn(data->dev, "Couldn't find syscon node\n"); in aspeed_adc_set_trim_data() 185 return -EOPNOTSUPP; in aspeed_adc_set_trim_data() 187 scu = syscon_node_to_regmap(syscon); in aspeed_adc_set_trim_data() [all …]
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