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/linux/arch/riscv/boot/dts/canaan/
H A Dk210.dtsi84 clocks = <&sysclk K210_CLK_SRAM0>,
85 <&sysclk K210_CLK_SRAM1>,
86 <&sysclk K210_CLK_AI>;
132 clocks = <&sysclk K210_CLK_CPU>;
157 clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
174 clocks = <&sysclk K210_CLK_APB0>;
181 clocks = <&sysclk K210_CLK_APB0>,
182 <&sysclk K210_CLK_GPIO>;
203 clocks = <&sysclk K210_CLK_UART1>,
204 <&sysclk K210_CLK_APB0>;
[all …]
/linux/arch/powerpc/boot/
H A Dmpc8xx.c55 void mpc8xx_set_clocks(u32 sysclk) in mpc8xx_set_clocks() argument
59 dt_fixup_cpu_clocks(sysclk, sysclk / 16, sysclk); in mpc8xx_set_clocks()
63 setprop(node, "clock-frequency", &sysclk, 4); in mpc8xx_set_clocks()
67 setprop(node, "clock-frequency", &sysclk, 4); in mpc8xx_set_clocks()
72 u32 sysclk = mpc885_get_clock(crystal); in mpc885_fixup_clocks() local
73 if (!sysclk) in mpc885_fixup_clocks()
76 mpc8xx_set_clocks(sysclk); in mpc885_fixup_clocks()
/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,qoriq-clock.yaml14 SYSCLK signal. The SYSCLK input (frequency) is multiplied using
88 0 sysclk must be 0
97 description: Input system clock frequency (SYSCLK)
102 sysclk may be provided as an input clock. Either clock-frequency
112 - const: sysclk
120 '^sysclk(-[a-z0-9]+)?$':
160 sysclk: sysclk {
161 compatible = "fsl,qoriq-sysclk-1.0";
162 clock-output-names = "sysclk";
170 clocks = <&sysclk>;
[all …]
H A Dfsl,qoriq-clock-legacy.yaml26 - fsl,qoriq-sysclk-1.0
27 - fsl,qoriq-sysclk-2.0
62 - fsl,qoriq-sysclk-1.0
63 - fsl,qoriq-sysclk-2.0
/linux/arch/arm/boot/dts/arm/
H A Dmps2.dtsi81 sysclk: spiclcd: spicon: i2cclcd: i2caud: clock-sys { label
119 clocks = <&sysclk>;
127 clocks = <&sysclk>;
134 clocks = <&sysclk>, <&sysclk>, <&sysclk>;
145 clocks = <&sysclk>;
153 clocks = <&sysclk>;
161 clocks = <&sysclk>;
170 clocks = <&sysclk>, <&sysclk>;
H A Dintegratorap-im-pd1.dts41 clocks = <&sysclk>;
51 clocks = <&sysclk>;
168 clocks = <&impd1_uartclk>, <&sysclk>;
176 clocks = <&impd1_uartclk>, <&sysclk>;
184 clocks = <&impd1_sspclk>, <&sysclk>;
196 clocks = <&sysclk>;
208 clocks = <&sysclk>;
216 clocks = <&sysclk>;
225 clocks = <&sysclk>, <&sysclk>;
238 clocks = <&sysclk>;
[all …]
/linux/sound/soc/ti/
H A Ddavinci-evm.c26 unsigned sysclk; member
60 unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *) in evm_hw_params() local
61 snd_soc_card_get_drvdata(soc_card))->sysclk; in evm_hw_params()
64 ret = snd_soc_dai_set_sysclk(codec_dai, 0, sysclk, SND_SOC_CLOCK_OUT); in evm_hw_params()
69 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_OUT); in evm_hw_params()
220 ret = of_property_read_u32(np, "ti,codec-clock-rate", &drvdata->sysclk); in davinci_evm_probe()
228 drvdata->sysclk = clk_get_rate(drvdata->mclk); in davinci_evm_probe()
230 unsigned int requestd_rate = drvdata->sysclk; in davinci_evm_probe()
231 clk_set_rate(drvdata->mclk, drvdata->sysclk); in davinci_evm_probe()
232 drvdata->sysclk = clk_get_rate(drvdata->mclk); in davinci_evm_probe()
[all …]
/linux/drivers/clk/davinci/
H A Dpll-da850.c49 SYSCLK(1, pll0_sysclk1, pll0_pllen, 5, SYSCLK_FIXED_DIV);
50 SYSCLK(2, pll0_sysclk2, pll0_pllen, 5, SYSCLK_FIXED_DIV);
51 SYSCLK(3, pll0_sysclk3, pll0_pllen, 5, 0);
52 SYSCLK(4, pll0_sysclk4, pll0_pllen, 5, SYSCLK_FIXED_DIV);
53 SYSCLK(5, pll0_sysclk5, pll0_pllen, 5, 0);
54 SYSCLK(6, pll0_sysclk6, pll0_pllen, 5, SYSCLK_ARM_RATE | SYSCLK_FIXED_DIV);
55 SYSCLK(7, pll0_sysclk7, pll0_pllen, 5, 0);
172 SYSCLK(1, pll1_sysclk1, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED);
173 SYSCLK(2, pll1_sysclk2, pll1_pllen, 5, 0);
174 SYSCLK(3, pll1_sysclk3, pll1_pllen, 5, 0);
H A Dpll-da830.c33 SYSCLK(2, pll0_sysclk2, pll0_pllen, 5, SYSCLK_FIXED_DIV);
34 SYSCLK(3, pll0_sysclk3, pll0_pllen, 5, 0);
35 SYSCLK(4, pll0_sysclk4, pll0_pllen, 5, SYSCLK_FIXED_DIV);
36 SYSCLK(5, pll0_sysclk5, pll0_pllen, 5, 0);
37 SYSCLK(6, pll0_sysclk6, pll0_pllen, 5, SYSCLK_FIXED_DIV);
38 SYSCLK(7, pll0_sysclk7, pll0_pllen, 5, 0);
/linux/arch/powerpc/platforms/83xx/
H A Dmpc832x_rdb.c41 static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk, in of_fsl_spi_probe() argument
62 pdata.sysclk = sysclk; in of_fsl_spi_probe()
127 u32 sysclk = -1; in fsl_spi_init() local
131 sysclk = get_brgfreq(); in fsl_spi_init()
132 if (sysclk == -1) { in fsl_spi_init()
133 sysclk = fsl_get_sys_freq(); in fsl_spi_init()
134 if (sysclk == -1) in fsl_spi_init()
138 ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos, in fsl_spi_init()
141 of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos, in fsl_spi_init()
/linux/sound/soc/codecs/
H A Dwm8960.c143 int sysclk; member
622 * wm8960_configure_sysclk - checks if there is a sysclk frequency available
623 * The sysclk must be chosen such that:
624 * - sysclk = MCLK / sysclk_divs
625 * - lrclk = sysclk / dac_divs
626 * - 10 * bclk = sysclk / bclk_divs
629 * @mclk: MCLK used to derive sysclk
630 * @sysclk_idx: sysclk_divs index for found sysclk
635 * -1, in case no sysclk frequency available found
636 * >=0, in case we could derive bclk and lrclk from sysclk using
[all …]
H A Dwm8998.c503 SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1,
914 { "OUT1L", NULL, "SYSCLK" },
915 { "OUT1R", NULL, "SYSCLK" },
916 { "OUT2L", NULL, "SYSCLK" },
917 { "OUT2R", NULL, "SYSCLK" },
918 { "OUT3", NULL, "SYSCLK" },
919 { "OUT4L", NULL, "SYSCLK" },
920 { "OUT4R", NULL, "SYSCLK" },
921 { "OUT5L", NULL, "SYSCLK" },
922 { "OUT5R", NULL, "SYSCLK" },
[all …]
H A Dwm5100.c64 int sysclk; member
135 if ((wm5100->sysclk % rate) == 0) { in wm5100_alloc_sr()
171 "SR %dHz incompatible with %dHz SYSCLK and %dHz ASYNCCLK\n", in wm5100_alloc_sr()
172 rate, wm5100->sysclk, wm5100->asyncclk); in wm5100_alloc_sr()
802 dev_crit(wm5100->dev, "SYSCLK underclocked\n"); in wm5100_log_status3()
860 SND_SOC_DAPM_SUPPLY("SYSCLK", WM5100_CLOCKING_3, WM5100_SYSCLK_ENA_SHIFT, 0,
1088 { "IN1L", NULL, "SYSCLK" },
1089 { "IN1R", NULL, "SYSCLK" },
1090 { "IN2L", NULL, "SYSCLK" },
1091 { "IN2R", NULL, "SYSCLK" },
[all …]
H A Dcs47l85.c783 SND_SOC_DAPM_SUPPLY("SYSCLK", MADERA_SYSTEM_CLOCK_1, MADERA_SYSCLK_ENA_SHIFT,
1794 { "OUT1L", NULL, "SYSCLK" },
1795 { "OUT1R", NULL, "SYSCLK" },
1796 { "OUT2L", NULL, "SYSCLK" },
1797 { "OUT2R", NULL, "SYSCLK" },
1798 { "OUT3L", NULL, "SYSCLK" },
1799 { "OUT3R", NULL, "SYSCLK" },
1800 { "OUT4L", NULL, "SYSCLK" },
1801 { "OUT4R", NULL, "SYSCLK" },
1802 { "OUT5L", NULL, "SYSCLK" },
[all …]
H A Dmax9860.c260 u8 sysclk = 0; in max9860_hw_params() local
369 sysclk = MAX9860_FREQ_12MHZ; in max9860_hw_params()
372 sysclk = MAX9860_FREQ_13MHZ; in max9860_hw_params()
375 sysclk = MAX9860_FREQ_19_2MHZ; in max9860_hw_params()
380 * sysclk at zero and fall through to the in max9860_hw_params()
386 if (sysclk && params_rate(params) == 16000) in max9860_hw_params()
387 sysclk |= MAX9860_16KHZ; in max9860_hw_params()
401 if (!sysclk) { in max9860_hw_params()
404 sysclk |= MAX9860_16KHZ; in max9860_hw_params()
410 sysclk |= max9860->psclk; in max9860_hw_params()
[all …]
H A Dcs47l24.c69 dev_err(component->dev, "Failed to read SYSCLK state: %d\n", ret); in cs47l24_adsp_power_ev()
343 SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1,
747 { "OUT1L", NULL, "SYSCLK" },
748 { "OUT1R", NULL, "SYSCLK" },
749 { "OUT4L", NULL, "SYSCLK" },
751 { "IN1L", NULL, "SYSCLK" },
752 { "IN1R", NULL, "SYSCLK" },
753 { "IN2L", NULL, "SYSCLK" },
754 { "IN2R", NULL, "SYSCLK" },
756 { "ASRC1L", NULL, "SYSCLK" },
[all …]
H A Dwm8997.c409 SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT,
759 { "OUT1L", NULL, "SYSCLK" },
760 { "OUT1R", NULL, "SYSCLK" },
761 { "OUT3L", NULL, "SYSCLK" },
762 { "OUT4L", NULL, "SYSCLK" },
764 { "IN1L", NULL, "SYSCLK" },
765 { "IN1R", NULL, "SYSCLK" },
766 { "IN2L", NULL, "SYSCLK" },
767 { "IN2R", NULL, "SYSCLK" },
773 { "Noise Generator", NULL, "SYSCLK" },
[all …]
H A Dadav80x.c145 unsigned int sysclk; member
205 SND_SOC_DAPM_SUPPLY("SYSCLK", SND_SOC_NOPM, 0, 0, NULL, 0),
269 { "SYSCLK", NULL, "PLL1", adav80x_dapm_sysclk_check },
270 { "SYSCLK", NULL, "PLL2", adav80x_dapm_sysclk_check },
271 { "SYSCLK", NULL, "OSC", adav80x_dapm_sysclk_check },
275 { "ADC", NULL, "SYSCLK" },
276 { "DAC", NULL, "SYSCLK" },
277 { "AIFOUT", NULL, "SYSCLK" },
278 { "AIFAUXOUT", NULL, "SYSCLK" },
279 { "AIFIN", NULL, "SYSCLK" },
[all …]
H A Dwm5110.c205 dev_err(component->dev, "Failed to read SYSCLK state: %d\n", ret); in wm5110_adsp_power_ev()
1098 SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT,
1750 { "OUT1L", NULL, "SYSCLK" },
1751 { "OUT1R", NULL, "SYSCLK" },
1752 { "OUT2L", NULL, "SYSCLK" },
1753 { "OUT2R", NULL, "SYSCLK" },
1754 { "OUT3L", NULL, "SYSCLK" },
1755 { "OUT3R", NULL, "SYSCLK" },
1756 { "OUT4L", NULL, "SYSCLK" },
1757 { "OUT4R", NULL, "SYSCLK" },
[all …]
H A Dcs47l92.c668 SND_SOC_DAPM_SUPPLY("SYSCLK", MADERA_SYSTEM_CLOCK_1, MADERA_SYSCLK_ENA_SHIFT,
1361 { "OUT1L", NULL, "SYSCLK" },
1362 { "OUT1R", NULL, "SYSCLK" },
1363 { "OUT2L", NULL, "SYSCLK" },
1364 { "OUT2R", NULL, "SYSCLK" },
1365 { "OUT3L", NULL, "SYSCLK" },
1366 { "OUT3R", NULL, "SYSCLK" },
1367 { "OUT5L", NULL, "SYSCLK" },
1368 { "OUT5R", NULL, "SYSCLK" },
1370 { "SPD1", NULL, "SYSCLK" },
[all …]
/linux/sound/soc/xilinx/
H A Dxlnx_i2s.c30 unsigned int sysclk; member
46 drv_data->sysclk = 0; in xlnx_i2s_set_sclkout_div()
58 drv_data->sysclk = freq; in xlnx_i2s_set_sysclk()
82 if (drv_data->sysclk) in xlnx_i2s_startup()
97 if (drv_data->sysclk) { in xlnx_i2s_hw_params()
106 sclk_div = drv_data->sysclk / sclk / 2; in xlnx_i2s_hw_params()
108 if ((drv_data->sysclk % sclk != 0) || in xlnx_i2s_hw_params()
110 dev_warn(i2s_dai->dev, "invalid SCLK divisor for sysclk %u and sclk %u\n", in xlnx_i2s_hw_params()
111 drv_data->sysclk, sclk); in xlnx_i2s_hw_params()
/linux/sound/soc/meson/
H A Daxg-pdm.c95 struct clk *sysclk; member
176 return clk_set_rate(priv->sysclk, sys_rate); in axg_pdm_set_sysclk()
178 return clk_set_rate(priv->sysclk, priv->cfg->sys_rate); in axg_pdm_set_sysclk()
187 spmax = DIV_ROUND_UP_ULL((u64)clk_get_rate(priv->sysclk), in axg_pdm_set_sample_pointer()
190 /* Check if sysclk is not too fast - should not happen */ in axg_pdm_set_sample_pointer()
386 * sysclk must be set and enabled as well to access the pdm registers in axg_pdm_dai_probe()
389 ret = clk_set_rate(priv->sysclk, priv->cfg->sys_rate); in axg_pdm_dai_probe()
391 dev_err(dai->dev, "setting sysclk failed\n"); in axg_pdm_dai_probe()
395 ret = clk_prepare_enable(priv->sysclk); in axg_pdm_dai_probe()
397 dev_err(dai->dev, "enabling sysclk failed\n"); in axg_pdm_dai_probe()
[all …]
/linux/drivers/spi/
H A Dspi-fsl-lib.c101 mpc8xxx_spi->spibrg = pdata->sysclk; in mpc8xxx_spi_probe()
135 pdata->sysclk = get_brgfreq(); in of_mpc8xxx_spi_probe()
136 if (pdata->sysclk == -1) { in of_mpc8xxx_spi_probe()
137 pdata->sysclk = fsl_get_sys_freq(); in of_mpc8xxx_spi_probe()
138 if (pdata->sysclk == -1) in of_mpc8xxx_spi_probe()
142 ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk); in of_mpc8xxx_spi_probe()
/linux/sound/soc/loongson/
H A Dloongson_i2s.c65 u32 sysclk = i2s->sysclk; in loongson_i2s_hw_params() local
77 mclk_ratio = DIV_ROUND_CLOSEST(clk_rate, (sysclk * 2)) - 1; in loongson_i2s_hw_params()
88 bclk_ratio = DIV_ROUND_CLOSEST(sysclk, in loongson_i2s_hw_params()
90 mclk_ratio = clk_rate / sysclk; in loongson_i2s_hw_params()
92 sysclk) - (mclk_ratio << 16); in loongson_i2s_hw_params()
120 i2s->sysclk = freq; in loongson_i2s_set_dai_sysclk()
/linux/Documentation/devicetree/bindings/clock/ti/davinci/
H A Dpll.txt32 sysclk
34 domains. The node name must be "sysclk". Consumers of this node should
67 pll0_sysclk: sysclk {
86 pll0_sysclk: sysclk {

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