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/linux/arch/openrisc/kernel/
H A Dsync-timer.c6 * All CPUs will have their count registers synchronised to the CPU0 next time
42 * then the last pass is more or less synchronised and in synchronise_count_master()
/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-flash.rst34 Synchronised LED flash (hardware strobe)
37 The synchronised LED flash is pre-programmed by the host (power and
H A Dmetafmt-d4xx.rst132 - Byte 0: bit 0: depth and RGB are synchronised, bit 1: external trigger
/linux/drivers/gpu/drm/i915/
H A Di915_syncmap.c143 * If we have already synchronised this @root timeline with another (@id) then
148 * Returns true if the two timelines are already synchronised wrt to @seqno,
340 * @id: the context id (other timeline) we have synchronised to
/linux/Documentation/arch/arm/samsung/
H A Dgpio.rst19 GPIO numbering is synchronised between the Samsung and gpiolib system.
/linux/arch/arm/mach-omap2/
H A Domap4-common.c71 * accesses) are properly synchronised with writes to DMA coherent memory
78 * Note: the SRAM path is not synchronised via mb() and wmb().
/linux/Documentation/devicetree/bindings/pwm/
H A Dmicrochip,corepwm.yaml47 synchronised mode for all channels it has been synthesised for.
/linux/arch/arm64/kvm/hyp/nvhe/
H A Ddebug-sr.c47 /* The host page table is installed, but not yet synchronised */ in __debug_restore_spe()
/linux/include/linux/
H A Ddm-dirty-log.h98 * tells you if an area is synchronised, the other
/linux/drivers/mailbox/
H A Dplatform_mhu.c5 * Synchronised with arm_mhu.c from :
/linux/rust/kernel/
H A Dtask.rs105 // synchronised by C code (e.g., `signal_pending`).
/linux/include/uapi/linux/
H A Dstat.h83 * - the datum will be synchronised to the server if AT_STATX_FORCE_SYNC is
/linux/tools/perf/trace/beauty/include/uapi/linux/
H A Dstat.h83 * - the datum will be synchronised to the server if AT_STATX_FORCE_SYNC is
/linux/tools/include/uapi/linux/
H A Dstat.h83 * - the datum will be synchronised to the server if AT_STATX_FORCE_SYNC is
/linux/drivers/mfd/
H A Ducb1x00-core.c228 * synchronised ADC conversions (via the ADCSYNC pin) must wait
234 * If called for a synchronised ADC conversion, it may sleep
/linux/Documentation/networking/
H A Dipvs-sysctl.rst298 0: All types of connections are synchronised
/linux/arch/sh/mm/
H A Dfault.c156 * The page tables are fully synchronised so there must in vmalloc_sync_one()
/linux/sound/soc/
H A Dsoc-jack.c28 * synchronised.
/linux/arch/powerpc/platforms/powernv/
H A Dsubcore.c109 * subcores have separate timebases SPRs but these are pre-synchronised by
/linux/drivers/iio/adc/
H A Dnau7802.c161 * Conversions are synchronised on the rising edge of NAU7802_PUCTRL_CS_BIT
/linux/arch/arm/include/asm/
H A Dcacheflush.h265 * Harvard caches are synchronised for the user space address range.
/linux/arch/mips/kernel/
H A Dsmp.c384 /* The CPU is running and counters synchronised, now mark it online */ in start_secondary()
/linux/drivers/misc/cxl/
H A Dfile.c137 * removed from the IDR (and RCU synchronised) it's safe to free the in afu_release()
/linux/fs/
H A Dstat.c234 * synchronised with the server.
/linux/drivers/rtc/
H A Drtc-stm32.c447 * synchronised, it takes around 2 rtc_ck clock cycles in stm32_rtc_wait_sync()

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