| /linux/drivers/memory/ |
| H A D | mvebu-devbus.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2013-2014 Marvell 14 #include <linux/clk.h> 96 dev_err(devbus->dev, "%pOF has no '%s' property\n", in get_timing_param_ps() 101 *ticks = (time_ps + devbus->tick_ps - 1) / devbus->tick_ps; in get_timing_param_ps() 103 dev_dbg(devbus->dev, "%s: %u ps -> 0x%x\n", in get_timing_param_ps() 115 err = of_property_read_u32(node, "devbus,bus-width", &r->bus_width); in devbus_get_timing_params() 117 dev_err(devbus->dev, in devbus_get_timing_params() 118 "%pOF has no 'devbus,bus-width' property\n", in devbus_get_timing_params() 127 if (r->bus_width == 8) { in devbus_get_timing_params() [all …]
|
| H A D | omap-gpmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2005-2006 Nokia Corporation 10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> 19 #include <linux/clk.h> 33 #include <linux/omap-gpmc.h> 37 #include <linux/platform_data/mtd-nand-omap2.h> 39 #define DEVICE_NAME "omap-gpmc" 258 /* Define chip-selects as reserved by default until probe completes */ 264 static struct clk *gpmc_l3_clk; 306 * gpmc_get_clk_period - get period of selected clock domain in ps [all …]
|
| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap2420-n8x0-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 stdout-path = &uart3; 16 compatible = "i2c-cbus-gpio"; 17 gpios = <&gpio3 2 GPIO_ACTIVE_HIGH /* gpio66 clk */ 21 #address-cells = <1>; 22 #size-cells = <0>; 25 interrupt-parent = <&gpio4>; 34 clock-frequency = <400000>; 44 clock-frequency = <400000>; 50 /* gpio-irq for dma: 26 */ [all …]
|
| H A D | omap3-gta04a5one.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> 6 #include "omap3-gta04a5.dts" 13 gpmc_pins: gpmc-pins { 14 pinctrl-single,pins = < 45 pinctrl-names = "default"; 46 pinctrl-0 = <&gpmc_pins>; 48 /delete-node/ nand@0,0; 52 #address-cells = <1>; 53 #size-cells = <1>; [all …]
|
| H A D | omap4-duovero-parlor.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 5 /dts-v1/; 7 #include "omap4-duovero.dtsi" 9 #include <dt-bindings/input/input.h> 13 compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4"; 20 compatible = "gpio-leds"; 24 linux,default-trigger = "heartbeat"; 29 compatible = "gpio-keys"; 30 #address-cells = <1>; 31 #size-cells = <0>; [all …]
|
| H A D | omap2430-sdp.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2"; 20 clock-frequency = <100000>; 31 vmmc-supply = <&vmmc1>; 32 bus-width = <4>; 39 interrupt-parent = <&gpio5>; 42 bank-width = <2>; 43 gpmc,sync-clk-ps = <0>; [all …]
|
| H A D | am335x-chilisom.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/ 7 #include <dt-bindings/interrupt-controller/irq.h> 11 compatible = "grinn,am335x-chilisom", "ti,am33xx"; 15 cpu0-supply = <&dcdc2_reg>; 26 pinctrl-names = "default"; 28 i2c0_pins: i2c0-pins { 29 pinctrl-single,pins = < 35 nandflash_pins: nandflash-pins { 36 pinctrl-single,pins = < [all …]
|
| H A D | am335x-nano.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Newflow Ltd - https://www.newflow.co.uk/ 5 /dts-v1/; 15 cpu0-supply = <&dcdc2_reg>; 25 compatible = "gpio-leds"; 30 default-state = "off"; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&misc_pins>; 39 misc_pins: misc-pins { 40 pinctrl-single,pins = < [all …]
|
| H A D | am335x-igep0033.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x 5 * Copyright (C) 2013 ISEE 2007 SL - https://www.isee.biz 8 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 16 cpu0-supply = <&vdd1_reg>; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&leds_pins>; 29 compatible = "gpio-leds"; 34 default-state = "on"; [all …]
|
| H A D | am335x-myirtech-myc.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */ 5 /* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ 7 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/leds/common.h> 15 model = "MYIR MYC-AM335X"; 16 compatible = "myir,myc-am335x", "ti,am33xx"; 20 cpu0-supply = <&vdd_core>; 21 voltage-tolerance = <2>; [all …]
|
| H A D | omap3-n950-n9.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff) 13 cpu0-supply = <&vcc>; 23 compatible = "regulator-fixed"; 24 regulator-name = "VEMMC"; 25 regulator-min-microvolt = <2900000>; 26 regulator-max-microvolt = <2900000>; 28 startup-delay-us = <150>; 29 enable-active-high; 33 compatible = "regulator-fixed"; [all …]
|
| H A D | am335x-phycore-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/interrupt-controller/irq.h> 12 compatible = "phytec,am335x-phycore-som", "ti,am33xx"; 22 cpu0-supply = <&vdd1_reg>; 32 compatible = "regulator-fixed"; 33 regulator-name = "vcc5v"; 34 regulator-min-microvolt = <5000000>; 35 regulator-max-microvolt = <5000000>; 36 regulator-boot-on; 37 regulator-always-on; [all …]
|
| H A D | am335x-guardian.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 14 compatible = "bosch,am335x-guardian", "ti,am33xx"; 17 stdout-path = &uart0; 18 tick-timer = &timer2; 23 cpu0-supply = <&dcdc2_reg>; 32 guardian_buttons: gpio-keys { [all …]
|
| H A D | omap3-n900.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi> 7 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/media/video-interfaces.h> 15 * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall 17 * blocks then kernel receive "Unhandled fault: external abort on non-linefetch" 18 * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no 34 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3"; [all …]
|
| H A D | dra72-evm-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "dra7-ipu-dsp-common.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/clock/ti-dra7-atl.h> 13 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"; 20 stdout-path = &uart1; 23 evm_12v0: fixedregulator-evm12v0 { 25 compatible = "regulator-fixed"; [all …]
|
| H A D | dra7-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "dra7-evm-common.dtsi" 9 #include "dra74x-mmc-iodelay.dtsi" 13 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"; 20 evm_12v0: fixedregulator-evm_12v0 { 22 compatible = "regulator-fixed"; 23 regulator-name = "evm_12v0"; 24 regulator-min-microvolt = <12000000>; [all …]
|
| /linux/drivers/fpga/ |
| H A D | zynq-fpga.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2011-2015 Xilinx Inc. 10 #include <linux/clk.h> 13 #include <linux/dma-mapping.h> 14 #include <linux/fpga/fpga-mgr.h> 113 /* Enable Level shifters from PS to PL */ 115 /* Enable Level shifters from PL to PS */ 124 struct clk *clk; member 140 writel(val, priv->io_base + offset); in zynq_fpga_write() 146 return readl(priv->io_base + offset); in zynq_fpga_read() [all …]
|
| /linux/drivers/video/fbdev/omap/ |
| H A D | hwa742.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2004-2005 Nokia Corporation 14 #include <linux/clk.h> 86 struct completion *sync; member 130 struct clk *sys_ck; 139 hwa742.extif->set_bits_per_cycle(8); in hwa742_read_reg() 140 hwa742.extif->write_command(®, 1); in hwa742_read_reg() 141 hwa742.extif->read_data(&data, 1); in hwa742_read_reg() 148 hwa742.extif->set_bits_per_cycle(8); in hwa742_write_reg() 149 hwa742.extif->write_command(®, 1); in hwa742_write_reg() [all …]
|
| H A D | sossi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2004-2005 Nokia Corporation 10 #include <linux/clk.h> 15 #include <linux/omap-dma.h> 16 #include <linux/soc/ti/omap1-io.h> 22 #define MODULE_NAME "omapfb-sossi" 49 struct clk *fck; 114 static u32 ps_to_sossi_ticks(u32 ps, int div) in ps_to_sossi_ticks() argument 117 return (clk_period + ps - 1) / clk_period; in ps_to_sossi_ticks() 124 int div = t->clk_div; in calc_rd_timings() [all …]
|
| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | ti,gpmc-child.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 24 gpmc,sync-clk-ps: 28 # Chip-select signal timings corresponding to GPMC_CONFIG2: 29 gpmc,cs-on-ns: 33 gpmc,cs-rd-off-ns: [all …]
|
| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am62-lp-sk-nand.dtso | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include "k3-pinctrl.h" 17 gpmc0_pins_default: gpmc0-pins-default { 18 pinctrl-single,pins = < 44 pinctrl-names = "default"; 45 pinctrl-0 = <&gpmc0_pins_default>; [all …]
|
| H A D | k3-am642-evm-nand.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include "k3-pinctrl.h" 15 gpmc0_default_pins: gpmc0-default-pins { 16 bootph-all; 17 pinctrl-single,pins = < 53 gpmc0-hog { [all …]
|
| /linux/drivers/phy/amlogic/ |
| H A D | phy-meson-axg-mipi-dphy.c | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <linux/clk.h> 33 * [11] mipi divider clk selection. 46 * [1] write 1 to sync the txclkesc input. the internal logic have to 52 /* [31] clk lane tx_hs_en control selection. 53 * 1: from register. 0: use clk lane state machine. 55 * [29] clk lane tx_lp_en contrl selection. 56 * 1: from register. 0: from clk lane state machine. 88 * [4] clk chan power down. this bit is also used as the power down 101 * [20:17] clk lane state. {mbias_ready, tx_stop, tx_ulps, tx_hs_active} [all …]
|
| /linux/drivers/net/phy/ |
| H A D | micrel.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 * Copyright (c) 2010-2013 Micrel, Inc. 29 #include <linux/clk.h> 129 * The value is calculated as following: (1/1000000)/((2^-32)/4) 135 * The value is calculated as following: (1/1000000)/((2^-32)/8) 446 struct clk *clk; member 560 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr() 564 if (type && type->interrupt_level_mask) in kszphy_config_intr() 565 mask = type->interrupt_level_mask; in kszphy_config_intr() 577 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in kszphy_config_intr() [all …]
|
| /linux/drivers/video/fbdev/ |
| H A D | sa1100fb.c | 16 * linux-arm-kernel@lists.arm.linux.org.uk 26 * - With the Neponset plugged into an Assabet, LCD powerdown 29 * - We don't limit the CPU clock rate nor the mode selection 33 * - Linear grayscale palettes and the kernel. 44 * - The following must never be specified in a panel definition: 47 * - The following should be specified: 57 * - Driver appears to be working for Brutus 320x200x8bpp mode. Other 66 * - FrameBuffer memory is now allocated at run-time when the 70 * - Big cleanup for dynamic selection of machine type at run time. 73 * - Support for Bitsy aka Compaq iPAQ H3600 added. [all …]
|