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/linux/drivers/media/pci/cx18/
H A Dcx18-irq.c15 static void xpu_ack(struct cx18 *cx, u32 sw2) in xpu_ack() argument
17 if (sw2 & IRQ_CPU_TO_EPU_ACK) in xpu_ack()
19 if (sw2 & IRQ_APU_TO_EPU_ACK) in xpu_ack()
34 u32 sw1, sw2, hw2; in cx18_irq_handler() local
37 sw2 = cx18_read_reg(cx, SW2_INT_STATUS) & cx->sw2_irq_mask; in cx18_irq_handler()
42 if (sw2) in cx18_irq_handler()
43 cx18_write_reg_expect(cx, sw2, SW2_INT_STATUS, ~sw2, sw2); in cx18_irq_handler()
47 if (sw1 || sw2 || hw2) in cx18_irq_handler()
48 CX18_DEBUG_HI_IRQ("received interrupts SW1: %x SW2: %x HW2: %x\n", in cx18_irq_handler()
49 sw1, sw2, hw2); in cx18_irq_handler()
[all …]
H A Dcx18-scb.h14 /* NOTE: All ACK interrupts are in the SW2 register. All non-ACK interrupts
110 /* Value to write to register SW2 register set (0xC7003140) after the
/linux/tools/testing/selftests/net/
H A Dtest_bridge_backup_port.sh35 # | sw1 | | sw2 |
154 setup_ns sw1 sw2
155 for ns in $sw1 $sw2; do
161 ip link set dev veth1 netns $sw2 name veth0
213 local ns=$sw2
239 cleanup_ns $sw1 $sw2
363 run_cmd "ip -n $sw2 address replace 192.0.2.36/32 dev lo"
368 run_cmd "tc -n $sw2 qdisc replace dev vx0 clsact"
369 …run_cmd "tc -n $sw2 filter replace dev vx0 ingress pref 1 handle 101 proto ip flower src_mac $smac…
370 …run_cmd "tc -n $sw2 filter replace dev vx0 ingress pref 1 handle 102 proto ip flower src_mac $smac…
[all …]
H A Dtest_bridge_neigh_suppress.sh45 # | sw1 | | sw2 |
152 setup_ns h1 h2 sw1 sw2
153 for ns in $h1 $h2 $sw1 $sw2; do
158 ip -n $sw1 link add name veth0 type veth peer name veth0 netns $sw2
159 ip -n $h2 link add name eth0 type veth peer name swp1 netns $sw2
257 local ns=$sw2
283 cleanup_ns $h1 $h2 $sw1 $sw2
/linux/Documentation/devicetree/bindings/regulator/
H A Dpfuze100.yaml15 sw1ab,sw1c,sw2,sw3a,sw3b,sw4,swbst,vsnvs,vrefddr,vgen1~vgen6
17 sw1ab,sw2,sw3a,sw3b,swbst,vsnvs,vrefddr,vgen1~vgen6,coin
19 sw1a,sw1b,sw2,sw3,swbst,vsnvs,vrefddr,vldo1,vldo2,vccsd,v33,vldo3,vldo4
21 sw1,sw2,sw3,vsnvs,vldo1,vldo2,vccsd,v33,vldo3,vldo4
122 sw2_reg: sw2 {
H A Dltc3676.txt8 - regulators: Contains eight regulator child nodes sw1, sw2, sw3, sw4,
13 nodes for sw1, sw2, sw3, sw4, ldo1, ldo2 and ldo4 additionally need to specify
20 Regulators sw1, sw2, sw3, sw4 can regulate the feedback reference from:
45 sw2_reg: sw2 {
H A Dltc3589.txt8 - regulators: Contains eight regulator child nodes sw1, sw2, sw3, bb-out,
13 nodes for sw1, sw2, sw3, bb-out, ldo1, and ldo2 additionally need to specify
20 Regulators sw1, sw2, sw3, and ldo2 can regulate the feedback reference from
45 sw2_reg: sw2 {
H A Dpv88060.txt11 BUCK1, LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7, SW1, SW2, SW3, SW4,
90 SW2 {
91 regulator-name = "sw2";
/linux/arch/arm/boot/dts/renesas/
H A Dsh73a0-kzm9g.dts113 label = "SW2-R";
119 label = "SW2-L";
125 label = "SW2-P";
131 label = "SW2-U";
137 label = "SW2-D";
H A Dr8a7792-blanche.dts114 label = "SW2-1";
121 label = "SW2-2";
128 label = "SW2-3";
135 label = "SW2-4";
H A Dr8a7794-alt.dts101 label = "SW2-1";
108 label = "SW2-2";
115 label = "SW2-3";
122 label = "SW2-4";
H A Dr8a7793-gose.dts76 label = "SW2-1";
83 label = "SW2-2";
90 label = "SW2-3";
97 label = "SW2-4";
H A Dr8a7790-lager.dts84 label = "SW2-1";
91 label = "SW2-2";
98 label = "SW2-3";
105 label = "SW2-4";
H A Dr8a7791-koelsch.dts85 label = "SW2-1";
92 label = "SW2-2";
99 label = "SW2-3";
106 label = "SW2-4";
/linux/drivers/regulator/
H A Dpfuze100-regulator.c373 PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
391 PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
409 PFUZE3000_SW_REG(PFUZE3000, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
424 PFUZE3000_SW_REG(PFUZE3001, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
439 { .name = "sw2", },
459 { .name = "sw2", },
479 { .name = "sw2", },
496 { .name = "sw2", },
783 /* SW2~SW4 high bit check and modify the voltage value table */ in pfuze100_regulator_probe()
H A Dltc3676.c172 /* SW1, SW2, SW3, SW4 linear 0.8V-3.3V with scalar via R1/R2 feeback res */
226 LTC3676_LINEAR_REG(SW2, sw2, BUCK2, DVB2A),
H A Dltc3589.c128 /* SW1, SW2, SW3, LDO2 */
255 LTC3589_LINEAR_REG(SW2, sw2, B2DTV1),
H A Dpcap-regulator.c132 VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA),
228 VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
/linux/drivers/staging/media/atomisp/pci/
H A Dsh_css_hrt.c69 * Wait till SP is idle or till there is a SW2 interrupt in sh_css_hrt_sp_wait()
70 * The SW2 interrupt will be used when frameloop runs on SP in sh_css_hrt_sp_wait()
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-qsrb.dts50 sw2_reg: sw2 {
51 regulator-name = "SW2";
/linux/Documentation/networking/
H A Darcnet-hardware.rst803 < | SW1 | | SW2 | |
831 SW2 1-6: Reserved for Future Use
1051 | | | SW2 |
1064 SW2: DIP-Switches for Memory Base and I/O Base addresses
1087 The I/O base address is coded with DIP-Switches 6,7 and 8 of SW2:
1104 DIP Switches 1-5 of SW2 encode the RAM and ROM Address Range:
1377 The eight switches in SW2 are used to set the node ID. Each node attached
1575 SW2 1-8: Node ID Select (ID0-ID7)
1588 The eight switches in SW2 are used to set the node ID. Each node attached
1833 | |SW2| |
[all …]
/linux/drivers/media/dvb-frontends/
H A Ddib0090.h87 extern int dib0090_set_switch(struct dvb_frontend *fe, u8 sw1, u8 sw2, u8 sw3);
157 u8 sw1, u8 sw2, u8 sw3) in dib0090_set_switch() argument
/linux/Documentation/devicetree/bindings/mfd/
H A Dmc13xxx.txt87 sw2 : regulator SW2 (register 25, bit 0)
/linux/drivers/media/i2c/
H A Dm52790.c44 u8 sw2 = (state->input | state->output) >> 8; in m52790_write() local
46 return i2c_smbus_write_byte_data(client, sw1, sw2); in m52790_write()
/linux/tools/testing/selftests/net/forwarding/
H A Dipip_lib.sh10 # SW2 uses non-default VRF tunnel has a bound dev.
38 # | SW2 + $ul2 |
106 # | SW2 | |

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