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/linux/tools/testing/selftests/net/
H A Dtest_bridge_backup_port.sh35 # | sw1 | | sw2 |
154 setup_ns sw1 sw2
155 for ns in $sw1 $sw2; do
160 ip link set dev veth0 netns $sw1 name veth0
200 local ns=$sw1
239 cleanup_ns $sw1 $sw2
254 run_cmd "tc -n $sw1 qdisc replace dev swp1 clsact"
255 …run_cmd "tc -n $sw1 filter replace dev swp1 egress pref 1 handle 101 proto ip flower src_mac $smac…
257 run_cmd "tc -n $sw1 qdisc replace dev vx0 clsact"
258 …run_cmd "tc -n $sw1 filter replace dev vx0 egress pref 1 handle 101 proto ip flower src_mac $smac …
[all …]
H A Dtest_bridge_neigh_suppress.sh45 # | sw1 | | sw2 |
154 setup_ns h1 h2 sw1 sw2
155 for ns in $h1 $h2 $sw1 $sw2; do
159 ip -n $h1 link add name eth0 type veth peer name swp1 netns $sw1
160 ip -n $sw1 link add name veth0 type veth peer name veth0 netns $sw2
248 local ns=$sw1
285 cleanup_ns $h1 $h2 $sw1 $sw2
302 run_cmd "tc -n $sw1 qdisc replace dev vx0 clsact"
303 run_cmd "tc -n $sw1 filter replace dev vx0 egress pref 1 handle 101 proto 0x0806 flower indev swp1 arp_tip $tip arp_sip $sip arp_op request action pass"
309 tc_check_packets $sw1 "de
[all...]
/linux/drivers/media/pci/cx18/
H A Dcx18-irq.c23 static void epu_cmd(struct cx18 *cx, u32 sw1) in epu_cmd() argument
25 if (sw1 & IRQ_CPU_TO_EPU) in epu_cmd()
27 if (sw1 & IRQ_APU_TO_EPU) in epu_cmd()
34 u32 sw1, sw2, hw2; in cx18_irq_handler() local
36 sw1 = cx18_read_reg(cx, SW1_INT_STATUS) & cx->sw1_irq_mask; in cx18_irq_handler()
40 if (sw1) in cx18_irq_handler()
41 cx18_write_reg_expect(cx, sw1, SW1_INT_STATUS, ~sw1, sw1); in cx18_irq_handler()
47 if (sw1 || sw2 || hw2) in cx18_irq_handler()
48 CX18_DEBUG_HI_IRQ("received interrupts SW1: %x SW2: %x HW2: %x\n", in cx18_irq_handler()
49 sw1, sw2, hw2); in cx18_irq_handler()
[all …]
H A Dcx18-scb.h15 are in the SW1 register. */
107 /* Value to write to register SW1 register set (0xC7003100) after the
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g044c2-smarc.dts11 * DIP-Switch SW1 setting on SoM
13 * SW1-2 : SW_SD0_DEV_SEL (1: eMMC; 0: uSD)
14 * SW1-3 : SW_SCIF_CAN (1: CAN1; 0: SCIF1)
15 * SW1-4 : SW_RSPI_CAN (1: CAN1; 0: RSPI1)
16 * SW1-5 : SW_I2S0_I2S1 (1: I2S2 (HDMI audio); 0: I2S0)
17 * Please change below macros according to SW1 setting
40 * - Set DIP-Switch SW1-4 to Off position.
H A Dr9a07g043u11-smarc.dts11 * DIP-Switch SW1 setting
13 * SW1-2 : SW_SD0_DEV_SEL (0: uSD; 1: eMMC)
14 * SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
15 * Please change below macros according to SW1 setting on the SoM
22 * - Set DIP-Switch SW1-3 to On position.
H A Drzg2l-smarc-som.dtsi12 /* SW1[2] should be at position 2/OFF to enable 64 GB eMMC */
17 * SW1[2] should be at position 3/ON.
260 * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
263 * SW1[2] should be at position 2/OFF to enable 64 GB eMMC
264 * SW1[2] should be at position 3/ON to enable uSD card CN3
H A Drzg2lc-smarc-som.dtsi179 * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
182 * SW1[2] should be at OFF position to enable 64 GB eMMC
183 * SW1[2] should be at position ON to enable uSD card CN3
/linux/arch/riscv/boot/dts/renesas/
H A Dr9a07g043f01-smarc.dts11 * DIP-Switch SW1 setting
13 * SW1-2 : SW_SD0_DEV_SEL (0: uSD; 1: eMMC)
14 * SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
15 * Please change below macros according to SW1 setting on the SoM
/linux/arch/arm/boot/dts/renesas/
H A Dr9a06g032-rzn1d400-db.dts37 label = "SW1-1";
44 label = "SW1-2";
51 label = "SW1-3";
58 label = "SW1-4";
65 label = "SW1-5";
72 label = "SW1-6";
79 label = "SW1-7";
86 label = "SW1-8";
H A Dr8a7742-iwg21d-q7-dbcm-ca.dts238 * Set SW1 switch on camera board to 'OFF' as we are using 8bit mode
270 /* Set SW1 switch on the SOM to 'ON' */
/linux/Documentation/devicetree/bindings/regulator/
H A Dltc3589.txt8 - regulators: Contains eight regulator child nodes sw1, sw2, sw3, bb-out,
13 nodes for sw1, sw2, sw3, bb-out, ldo1, and ldo2 additionally need to specify
20 Regulators sw1, sw2, sw3, and ldo2 can regulate the feedback reference from
36 sw1_reg: sw1 {
H A Dpv88060.txt11 BUCK1, LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7, SW1, SW2, SW3, SW4,
84 SW1 {
85 regulator-name = "sw1";
/linux/Documentation/networking/
H A Darcnet-hardware.rst803 < | SW1 | | SW2 | |
829 SW1 1-6: I/O Base Address Select
889 The first six switches in switch group SW1 are used to select one
932 Switches seven through ten of switch group SW1 are used to select the
1063 SW1: DIP-Switches for Station Address
1085 The station address is binary-coded with SW1.
1341 | | 90C65 || SW1 | ____|
1419 The last three switches in switch block SW1 are used to select one
1442 Switches 1-5 of switch block SW1 select the Memory Base address.
1554 < | PROM | | SW1 | A | 2 | ID3
[all …]
/linux/Documentation/hid/
H A Dhid-alps.rst114 1 0 0 SW6 SW5 SW4 SW3 SW2 SW1
148 SW1-SW6:
164 Byte1 1 1 1 0 1 SW3 SW2 SW1
173 SW1-SW3:
/linux/arch/mips/kernel/
H A Dbmips_vec.S36 * triggered by the SW1 interrupt. If that is the case we try to move
50 /* re-enable IRQs to wait for SW1 */
66 /* wait here for SW1 interrupt from bmips_boot_secondary() */
/linux/drivers/media/dvb-frontends/
H A Ddib0090.h87 extern int dib0090_set_switch(struct dvb_frontend *fe, u8 sw1, u8 sw2, u8 sw3);
157 u8 sw1, u8 sw2, u8 sw3) in dib0090_set_switch() argument
/linux/Documentation/devicetree/bindings/mfd/
H A Dmc13xxx.txt86 sw1 : regulator SW1 (register 24, bit 0)
/linux/drivers/media/i2c/
H A Dm52790.c43 u8 sw1 = (state->input | state->output) & 0xff; in m52790_write() local
46 return i2c_smbus_write_byte_data(client, sw1, sw2); in m52790_write()
/linux/drivers/regulator/
H A Dltc3676.c172 /* SW1, SW2, SW3, SW4 linear 0.8V-3.3V with scalar via R1/R2 feeback res */
225 LTC3676_LINEAR_REG(SW1, sw1, BUCK1, DVB1A),
H A Dltc3589.c128 /* SW1, SW2, SW3, LDO2 */
254 LTC3589_LINEAR_REG(SW1, sw1, B1DTV1),
H A Dmc13892-regulator.c267 MC13892_SW_DEFINE(SW1, sw1, SWITCHERS0, SWITCHERS0, mc13892_sw1),
418 * According to the MC13892 documentation note 59 (Table 47) the SW1 in mc13892_sw_regulator_get_voltage_sel()
450 * Don't mess with the HI bit or support HI voltage offsets for SW1. in mc13892_sw_regulator_set_voltage_sel()
H A Dpcap-regulator.c131 VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA),
228 VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
/linux/sound/soc/amd/ps/
H A Dacp63.h334 * @acp70_sdw1_wake_event: flag set to true when wake irq asserted for SW1 instance
343 * manager-SW1 instance
347 * manager-SW1 instance
/linux/tools/testing/selftests/net/forwarding/
H A Dipip_lib.sh9 # SW1 uses default VRF so tunnel has no bound dev.
18 # | SW1 | |
73 # | SW1 | |

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