Searched full:sv48 (Results 1 – 9 of 9) sorted by relevance
/linux/arch/riscv/boot/dts/sophgo/ |
H A D | sg2044-cpus.dtsi | 25 mmu-type = "riscv,sv48"; 60 mmu-type = "riscv,sv48"; 95 mmu-type = "riscv,sv48"; 130 mmu-type = "riscv,sv48"; 165 mmu-type = "riscv,sv48"; 200 mmu-type = "riscv,sv48"; 235 mmu-type = "riscv,sv48"; 270 mmu-type = "riscv,sv48"; 305 mmu-type = "riscv,sv48"; 340 mmu-type = "riscv,sv48"; [all …]
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/linux/Documentation/devicetree/bindings/riscv/ |
H A D | cpus.yaml | 88 - riscv,sv48 218 mmu-type = "riscv,sv48";
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/linux/Documentation/devicetree/bindings/cpu/ |
H A D | idle-states.yaml | 785 mmu-type = "riscv,sv48"; 801 mmu-type = "riscv,sv48"; 817 mmu-type = "riscv,sv48"; 833 mmu-type = "riscv,sv48";
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/linux/Documentation/translations/zh_CN/arch/riscv/ |
H A D | vm-layout.rst | 71 RISC-V Linux Kernel SV48
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/linux/Documentation/arch/riscv/ |
H A D | vm-layout.rst | 67 RISC-V Linux Kernel SV48
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/linux/arch/riscv/kernel/ |
H A D | cpu.c | 300 sv_type = "sv48"; in print_mmu()
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/linux/tools/testing/selftests/kvm/lib/riscv/ |
H A D | processor.c | 202 * The RISC-V Sv48 MMU mode supports 56-bit physical address in riscv_vcpu_mmu_setup()
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/linux/arch/riscv/include/asm/ |
H A D | pgtable.h | 1067 * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu
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/linux/arch/riscv/mm/ |
H A D | init.c | 857 * meaning sv48 is supported.
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