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/linux/Documentation/hwmon/
H A Dnct6775.rst15 Addresses scanned: ISA address retrieved from Super I/O registers
19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
23 Addresses scanned: ISA address retrieved from Super I/O registers
31 Addresses scanned: ISA address retrieved from Super I/O registers
39 Addresses scanned: ISA address retrieved from Super I/O registers
47 Addresses scanned: ISA address retrieved from Super I/O registers
55 Addresses scanned: ISA address retrieved from Super I/O registers
63 Addresses scanned: ISA address retrieved from Super I/O registers
71 Addresses scanned: ISA address retrieved from Super I/O registers
79 Addresses scanned: ISA address retrieved from Super I/O registers
[all …]
H A Dit87.rst10 Addresses scanned: from Super I/O config space (8 I/O ports)
18 Addresses scanned: from Super I/O config space (8 I/O ports)
24 Addresses scanned: from Super I/O config space (8 I/O ports)
32 Addresses scanned: from Super I/O config space (8 I/O ports)
40 Addresses scanned: from Super I/O config space (8 I/O ports)
48 Addresses scanned: from Super I/O config space (8 I/O ports)
56 Addresses scanned: from Super I/O config space (8 I/O ports)
64 Addresses scanned: from Super I/O config space (8 I/O ports)
72 Addresses scanned: from Super I/O config space (8 I/O ports)
80 Addresses scanned: from Super I/O config space (8 I/O ports)
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H A Dw83627hf.rst7 Addresses scanned: ISA address retrieved from Super I/O registers
10 Addresses scanned: ISA address retrieved from Super I/O registers
13 Addresses scanned: ISA address retrieved from Super I/O registers
16 Addresses scanned: ISA address retrieved from Super I/O registers
19 Addresses scanned: ISA address retrieved from Super I/O registers
29 -----------------
39 -----------
42 the Winbond W83627HF, W83627THF, W83697HF and W83637HF Super I/O chips.
47 Super I/O chip and a second i2c-only Winbond chip (often a W83782D),
51 If you really want i2c accesses for these Super I/O chips,
[all …]
H A Df71805f.rst10 Addresses scanned: none, address read from Super I/O config space
18 Addresses scanned: none, address read from Super I/O config space
26 Addresses scanned: none, address read from Super I/O config space
44 -----------
46 The Fintek F71805F/FG Super I/O chip includes complete hardware monitoring
53 The Fintek F71872F/FG Super I/O chip is almost the same, with two
57 The Fintek F71806F/FG Super-I/O chip is essentially the same as the
65 ------------------
67 Voltages are sampled by an 8-bit ADC with a LSB of 8 mV. The supported
75 you can only set the limits in steps of 32 mV (before scaling).
[all …]
H A Dw83627ehf.rst10 Addresses scanned: ISA address retrieved from Super I/O registers
18 Addresses scanned: ISA address retrieved from Super I/O registers
22 * Winbond W83627DHG-P
26 Addresses scanned: ISA address retrieved from Super I/O registers
34 Addresses scanned: ISA address retrieved from Super I/O registers
42 Addresses scanned: ISA address retrieved from Super I/O registers
46 * Winbond W83667HG-B
50 Addresses scanned: ISA address retrieved from Super I/O registers
54 * Nuvoton NCT6775F/W83667HG-I
58 Addresses scanned: ISA address retrieved from Super I/O registers
[all …]
/linux/tools/crypto/ccp/
H A Dtest_dbc.py2 # SPDX-License-Identifier: GPL-2.0
15 # Artificial delay between set commands
25 def system_is_secured() -> bool:
34 def __init__(self, data) -> None:
38 super().__init__(data)
40 def setUp(self) -> None:
42 return super().setUp()
44 def tearDown(self) -> None:
47 return super().tearDown()
51 def setUp(self) -> None:
[all …]
/linux/drivers/nvdimm/
H A Dbtt.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2014-2015, Intel Corporation.
9 #include <linux/blk-integrity.h>
19 #include <linux/backing-dev.h>
31 return &arena->nd_btt->dev; in to_dev()
36 return offset + nd_btt->initial_offset; in adjust_initial_offset()
42 struct nd_btt *nd_btt = arena->nd_btt; in arena_read_bytes()
43 struct nd_namespace_common *ndns = nd_btt->ndns; in arena_read_bytes()
53 struct nd_btt *nd_btt = arena->nd_btt; in arena_write_bytes()
54 struct nd_namespace_common *ndns = nd_btt->ndns; in arena_write_bytes()
[all …]
/linux/drivers/clk/tegra/
H A Dclk-super.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
28 #define super_state_to_src_shift(m, s) ((m->width * s))
29 #define super_state_to_src_mask(m) (((1 << m->width) - 1))
40 val = readl_relaxed(mux->reg); in clk_super_get_parent()
53 * If LP_DIV2_BYPASS is not set and PLLX is current parent then in clk_super_get_parent()
56 if ((mux->flags & TEGRA_DIVIDER_2) && !(val & SUPER_LP_DIV2_BYPASS) && in clk_super_get_parent()
57 (source == mux->pllx_index)) in clk_super_get_parent()
58 source = mux->div2_index; in clk_super_get_parent()
71 if (mux->lock) in clk_super_set_parent()
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/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
[all …]
/linux/fs/nilfs2/
H A Dthe_nilfs.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2005-2008 Nippon Telegraph and Telephone Corporation.
14 #include <linux/backing-dev.h>
31 spin_lock(&nilfs->ns_last_segment_lock); in nilfs_set_last_segment()
32 nilfs->ns_last_pseg = start_blocknr; in nilfs_set_last_segment()
33 nilfs->ns_last_seq = seq; in nilfs_set_last_segment()
34 nilfs->ns_last_cno = cno; in nilfs_set_last_segment()
37 if (nilfs->ns_prev_se in nilfs_set_last_segment()
[all...]
H A Dthe_nilfs.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Copyright (C) 2005-2008 Nippon Telegraph and Telephone Corporation.
19 #include <linux/backing-dev.h>
28 THE_NILFS_INIT = 0, /* Information from super_block is set */
31 THE_NILFS_SB_DIRTY, /* super block is dirty */
36 * struct the_nilfs - struct to supervise multiple nilfs mount points
39 * @ns_sb: back pointer to super block instance
43 * @ns_sbh: buffer heads of on-disk super blocks
44 * @ns_sbp: pointers to super block data
45 * @ns_sbwtime: previous write time of super block
[all …]
/linux/fs/cramfs/
H A Dinode.c26 #include <linux/mtd/super.h>
37 * cramfs super-block data in memory
52 return sb->s_fs_info; in CRAMFS_SB()
65 #define OFFSET(x) ((x)->i_ino)
69 if (!cino->offset) in cramino()
71 if (!cino->size) in cramino()
76 * cramfs_inode->offset is set to a non zero value for entries in cramino()
79 switch (cino->mode & S_IFMT) { in cramino()
83 return cino->offset << 2; in cramino()
98 return ERR_PTR(-ENOMEM); in get_cramfs_inode()
[all …]
/linux/drivers/net/wireless/ath/carl9170/
H A Dtx.c25 * Copyright (c) 2007-2008 Atheros Communications, Inc.
72 return (DIV_ROUND_UP(IEEE80211_MAX_FRAME_LEN, ar->fw.mem_block_size) > in is_mem_full()
73 atomic_read(&ar->mem_free_blocks)); in is_mem_full()
81 atomic_inc(&ar->tx_total_queued); in carl9170_tx_accounting()
84 spin_lock_bh(&ar->tx_stats_lock); in carl9170_tx_accounting()
92 ar->tx_stats[queue].len++; in carl9170_tx_accounting()
93 ar->tx_stats[queue].count++; in carl9170_tx_accounting()
96 for (i = 0; i < ar->hw->queues; i++) { in carl9170_tx_accounting()
97 if (mem_full || ar->tx_stats[i].len >= ar->tx_stats[i].limit) { in carl9170_tx_accounting()
98 ieee80211_stop_queue(ar->hw, i); in carl9170_tx_accounting()
[all …]
/linux/tools/testing/selftests/net/lib/py/
H A Dynl.py1 # SPDX-License-Identifier: GPL-2.0
10 if (KSFT_DIR / "kselftest-list.txt").exists():
32 # Set schema='' to avoid jsonschema validation, it's slow
36 super().__init__((SPEC_PATH / Path('ethtool.yaml')).as_posix(),
42 super().__init__((SPEC_PATH / Path('rt_link.yaml')).as_posix(),
48 super().__init__((SPEC_PATH / Path('netdev.yaml')).as_posix(),
53 super().__init__((SPEC_PATH / Path('net_shaper.yaml')).as_posix(),
/linux/drivers/watchdog/
H A Driowd.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* riowd.c - driver for hw watchdog inside Super I/O of RIO
23 /* RIO uses the NatSemi Super I/O power management logical device
28 * trigger a power-on reset when the signal is asserted. The BBC
31 * The only Super I/O device register we care about is at index
32 * 0x05 (WDTO_INDEX) which is the watchdog time-out in minutes (1-255).
33 * If set to zero, this disables the watchdog. When set, the system
34 * must periodically (before watchdog expires) clear (set to zero) and
35 * re-set the watchdog else it will trigger.
37 * There are two other indexed watchdog registers inside this Super I/O
[all …]
/linux/fs/autofs/
H A Ddev-ioctl.c1 // SPDX-License-Identifier: GPL-2.0-or-later
34 return -EINVAL; in check_name()
46 return -EINVAL; in invalid_str()
60 if ((param->ver_major != AUTOFS_DEV_IOCTL_VERSION_MAJOR) || in check_dev_ioctl_version()
61 (param->ver_minor > AUTOFS_DEV_IOCTL_VERSION_MINOR)) { in check_dev_ioctl_version()
66 param->ver_major, param->ver_minor, cmd); in check_dev_ioctl_version()
67 err = -EINVAL; in check_dev_ioctl_version()
71 param->ver_major = AUTOFS_DEV_IOCTL_VERSION_MAJOR; in check_dev_ioctl_version()
72 param->ver_minor = AUTOFS_DEV_IOCTL_VERSION_MINOR; in check_dev_ioctl_version()
87 return ERR_PTR(-EFAULT); in copy_dev_ioctl()
[all …]
/linux/include/linux/
H A Dsysv_fs.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 On Coherent FS, they are always stored in PDP-11 manner: the least
21 /* 0 is non-existent */
26 /* Xenix super-block data on disk */
41 char s_fmod; /* super-block modified flag */
42 char s_ronly; /* flag whether fs is mounted read-only */
43 __fs32 s_time __packed2__; /* time of last super block update */
49 char s_clean; /* set to 0x46 when filesystem is properly unmounted */
66 /* SystemV4 super-block data on disk */
82 char s_fmod; /* super-block modified flag */
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dbase.c44 head->func->vblank_put(head); in nvkm_disp_vblank_fini()
53 head->func->vblank_get(head); in nvkm_disp_vblank_init()
65 nvkm_event_ntfy(&disp->vblank, head, NVKM_DISP_HEAD_EVENT_VBLANK); in nvkm_disp_vblank()
85 struct nvkm_disp *disp = nvkm_disp(oclass->engine); in nvkm_disp_class_get()
87 oclass->base = disp->func->root; in nvkm_disp_class_get()
98 disp->func->intr(disp); in nvkm_disp_intr()
107 if (disp->func->fini) in nvkm_disp_fini()
108 disp->func->fini(disp, suspend); in nvkm_disp_fini()
110 list_for_each_entry(outp, &disp->outps, head) { in nvkm_disp_fini()
111 if (outp->func->fini) in nvkm_disp_fini()
[all …]
/linux/fs/befs/
H A DChangeLog1 Version 0.92 (2002-03-29)
5 Version 0.92 (2002-03-27)
12 Version 0.91 (2002-03-26)
17 Version 0.9 (2002-03-14)
25 Version 0.64 (2002-02-07)
41 * Made a debian package of the source for use with kernel-package. [WD]
44 Version 0.63 (2002-01-31)
63 * Makefile fix for independent module when CONFIG_MODVERSION is set in
74 Version 0.61 (2002-01-20)
92 Version 0.6 (2001-12-15)
[all …]
/linux/drivers/usb/gadget/function/
H A Du_uvc.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd.
36 * Control descriptors array pointers for full-/high-speed and
37 * super-speed. They point by default to the uvc_fs_control_cls and
45 * Streaming descriptors array pointers for full-speed, high-speed and
46 * super-speed. They will point to the uvc_[fhs]s_streaming_cls arrays
47 * for configfs-based gadgets. Legacy gadgets must initialize them in
54 /* Default control descriptors for configfs-based gadgets. */
60 * Control descriptors pointers arrays for full-/high-speed and
61 * super-speed. The first element is a configurable control header
[all …]
/linux/drivers/gpio/
H A Dgpio-it87.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO interface for IT87xx Super I/O chips
9 * gpio-it8761e.c by Denis Turischev
10 * gpio-stmpe.c by Rabin Vincent
49 * struct it87_gpio - it87-specific GPIO chip
54 * @output_base: Super I/O register address for Output Enable register
55 * @simple_base: Super I/O 'Simple I/O' Enable register
56 * @simple_size: Super IO 'Simple I/O' Enable register size; this is
83 return -EBUSY; in superio_enter()
155 spin_lock(&it87_gpio->lock); in it87_gpio_request()
[all …]
/linux/Documentation/admin-guide/device-mapper/
H A Ddm-zoned.rst2 dm-zoned
5 The dm-zoned device mapper target exposes a zoned block device (ZBC and
7 pattern constraints. In effect, it implements a drive-managed zoned
10 host-managed zoned block devices and can mitigate the potential
11 device-side performance degradation due to excessive random writes on
12 host-aware zoned block devices.
21 http://www.t13.org/Documents/UploadedDocuments/docs2015/di537r05-Zoned_Device_ATA_Command_Set_ZAC.p…
23 The dm-zoned implementation is simple and minimizes system overhead (CPU
25 host-managed disk with 256 MB zones, dm-zoned memory usage per disk
29 dm-zoned target devices are formatted and checked using the dmzadm
[all …]
/linux/tools/testing/selftests/tc-testing/plugin-lib/
H A DnsPlugin.py23 super().__init__()
26 super().pre_suite(testcount, testlist)
53 ticks -= 1
79 cmd = self._replace_keywords("$IP -a netns del")
87 super().adjust_command(stage, command)
139 ip.link('set', index=dev1_idx, state='up')
140 ip.link('set', index=dummy_idx, state='up')
144 ticks -= 1
155 ip.link('set', index=dev0_idx, state='up')
159 ticks -= 1
[all …]
/linux/include/uapi/linux/
H A Dnilfs2_ondisk.h1 /* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
3 * nilfs2_ondisk.h - NILFS2 on-disk structures
5 * Copyright (C) 2005-2008 Nippon Telegraph and Telephone Corporation.
17 * Laboratoire MASI - Institut Blaise Pascal
37 * struct nilfs_inode - structure of an inode on disk
76 * struct nilfs_super_root - structure of super root
96 ((unsigned long)&((struct nilfs_super_root *)0)->sr_dat + \
109 * File system states (sbp->s_state, nilfs->ns_mount_state)
116 * Mount flags (sbi->s_mount_opt)
124 * Apply strict in-order
[all …]
/linux/arch/alpha/kernel/
H A Dsmc37c669.c52 * Super I/O controller.
60 * er 28-Jan-1997 Initial Entry
69 ** The mask acts as a flag used in mapping actual ISA IRQs (0 - 15)
70 ** to device IRQs (A - H).
84 ** channels to device DMA channels (A - C).
218 ** CR00 - default value 0x28
221 ** 0x - 30ua pull-ups on nIDEEN, nHDCS0, NHDCS1
222 ** 11 - IRQ_H available as IRQ output,
224 ** 10 - nIDEEN, nHDCS0, nHDCS1 used to control IDE
230 ** take care to set this bit at the appropriate times.
[all …]

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