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Searched +full:sun9i +full:- +full:a80 +full:- +full:usb +full:- +full:clks (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun9i-a80-usb-clks.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A80 USB Clock Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#clock-cells":
17 "#reset-cells":
21 const: allwinner,sun9i-a80-usb-clks
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/linux/drivers/clk/sunxi-ng/
H A Dccu-sun9i-a80-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
7 #include <linux/clk-provider.h>
15 #include "ccu-sun9i-a80-usb.h"
25 static SUNXI_CCU_GATE_DATA(bus_hci0_clk, "bus-hci0", clk_parent_bus, 0x0, BIT(1), 0);
26 static SUNXI_CCU_GATE_DATA(usb_ohci0_clk, "usb-ohci0", clk_parent_hosc, 0x0, BIT(2), 0);
27 static SUNXI_CCU_GATE_DATA(bus_hci1_clk, "bus-hci1", clk_parent_bus, 0x0, BIT(3), 0);
28 static SUNXI_CCU_GATE_DATA(bus_hci2_clk, "bus-hci2", clk_parent_bus, 0x0, BIT(5), 0);
29 static SUNXI_CCU_GATE_DATA(usb_ohci2_clk, "usb-ohci2", clk_parent_hosc, 0x0, BIT(6), 0);
31 static SUNXI_CCU_GATE_DATA(usb0_phy_clk, "usb0-phy", clk_parent_hosc, 0x4, BIT(1), 0);
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/linux/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
52 #include <dt-bindings/reset/sun9i-a80-usb.h>
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/linux/drivers/clk/sunxi/
H A Dclk-usb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013-2015 Emilio López
9 #include <linux/clk-provider.h>
13 #include <linux/reset-controller.h>
19 * sunxi_usb_reset... - reset bits in usb clk registers handling
38 clk_prepare_enable(data->clk); in sunxi_usb_reset_assert()
39 spin_lock_irqsave(data->lock, flags); in sunxi_usb_reset_assert()
41 reg = readl(data->reg); in sunxi_usb_reset_assert()
42 writel(reg & ~BIT(id), data->reg); in sunxi_usb_reset_assert()
44 spin_unlock_irqrestore(data->lock, flags); in sunxi_usb_reset_assert()
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