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Searched +full:sun9i +full:- +full:a80 +full:- +full:ccu (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/clk/sunxi-ng/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_SUNXI_CCU) += sunxi-ccu.o
6 sunxi-ccu-y += ccu_common.o
7 sunxi-ccu-y += ccu_mmc_timing.o
8 sunxi-ccu-y += ccu_reset.o
11 sunxi-ccu-y += ccu_div.o
12 sunxi-ccu-y += ccu_frac.o
13 sunxi-ccu-y += ccu_gate.o
14 sunxi-ccu-y += ccu_mux.o
15 sunxi-ccu-y += ccu_mult.o
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H A Dccu-sun9i-a80.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 2016 Chen-Yu Tsai
5 * Chen-Yu Tsai <wens@csie.org>
11 #include <dt-bindings/clock/sun9i-a80-ccu.h>
12 #include <dt-bindings/reset/sun9i-a80-ccu.h>
17 /* pll-audio and pll-periph0 are exported to the PRCM block */
H A Dccu-sun9i-a80-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
7 #include <linux/clk-provider.h>
15 #include "ccu-sun9i-a80-usb.h"
25 static SUNXI_CCU_GATE_DATA(bus_hci0_clk, "bus-hci0", clk_parent_bus, 0x0, BIT(1), 0);
26 static SUNXI_CCU_GATE_DATA(usb_ohci0_clk, "usb-ohci0", clk_parent_hosc, 0x0, BIT(2), 0);
27 static SUNXI_CCU_GATE_DATA(bus_hci1_clk, "bus-hci1", clk_parent_bus, 0x0, BIT(3), 0);
28 static SUNXI_CCU_GATE_DATA(bus_hci2_clk, "bus-hci2", clk_parent_bus, 0x0, BIT(5), 0);
29 static SUNXI_CCU_GATE_DATA(usb_ohci2_clk, "usb-ohci2", clk_parent_hosc, 0x0, BIT(6), 0);
31 static SUNXI_CCU_GATE_DATA(usb0_phy_clk, "usb0-phy", clk_parent_hosc, 0x4, BIT(1), 0);
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H A Dccu-sun9i-a80-de.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
7 #include <linux/clk-provider.h>
17 #include "ccu-sun9i-a80-de.h"
19 static SUNXI_CCU_GATE(fe0_clk, "fe0", "fe0-div",
21 static SUNXI_CCU_GATE(fe1_clk, "fe1", "fe1-div",
23 static SUNXI_CCU_GATE(fe2_clk, "fe2", "fe2-div",
25 static SUNXI_CCU_GATE(iep_deu0_clk, "iep-deu0", "de",
27 static SUNXI_CCU_GATE(iep_deu1_clk, "iep-deu1", "de",
29 static SUNXI_CCU_GATE(be0_clk, "be0", "be0-div",
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H A Dccu-sun9i-a80.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
6 #include <linux/clk-provider.h>
21 #include "ccu-sun9i-a80.h"
28 * Neither mainline Linux, U-boot, nor the vendor BSPs use these.
43 .hw.init = CLK_HW_INIT("pll-c0cpux", "osc24M",
57 .hw.init = CLK_HW_INIT("pll-c1cpux", "osc24M",
79 .hw.init = CLK_HW_INIT("pll-audio", "osc24M",
95 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
111 .hw.init = CLK_HW_INIT("pll-ve", "osc24M",
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/linux/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
52 #include <dt-bindings/reset/sun9i-a80-usb.h>
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H A Dsun8i-v3s.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun6i-rtc.h>
46 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
47 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
51 #address-cells = <1>;
52 #size-cells = <1>;
53 interrupt-parent = <&gic>;
56 #address-cells = <1>;
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/linux/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun9i-a80-de-clks.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-de-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A80 Display Engine Clock Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#clock-cells":
17 "#reset-cells":
21 const: allwinner,sun9i-a80-de-clks
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H A Dallwinner,sun9i-a80-usb-clks.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A80 USB Clock Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#clock-cells":
17 "#reset-cells":
21 const: allwinner,sun9i-a80-usb-clks
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H A Dallwinner,sun4i-a10-ccu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#clock-cells":
17 "#reset-cells":
22 - allwinner,sun4i-a10-ccu
23 - allwinner,sun5i-a10s-ccu
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/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
24 - const: allwinner,sun5i-a13-tcon
25 - const: allwinner,sun6i-a31-tcon
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H A Dallwinner,sun6i-a31-drc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-drc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
21 - allwinner,sun6i-a31-drc
22 - allwinner,sun6i-a31s-drc
23 - allwinner,sun8i-a23-drc
24 - allwinner,sun8i-a33-drc
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H A Dallwinner,sun4i-a10-display-frontend.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-frontend.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
20 - allwinner,sun4i-a10-display-frontend
21 - allwinner,sun5i-a13-display-frontend
22 - allwinner,sun6i-a31-display-frontend
23 - allwinner,sun7i-a20-display-frontend
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H A Dallwinner,sun4i-a10-display-backend.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
19 - allwinner,sun4i-a10-display-backend
20 - allwinner,sun5i-a13-display-backend
21 - allwinner,sun6i-a31-display-backend
22 - allwinner,sun7i-a20-display-backend
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dallwinner,sun4i-a10-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#gpio-cells":
21 "#interrupt-cells":
30 - allwinner,sun4i-a10-pinctrl
31 - allwinner,sun5i-a10s-pinctrl
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/linux/Documentation/devicetree/bindings/mailbox/
H A Dallwinner,sun6i-a31-msgbox.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mailbox/allwinner,sun6i-a31-msgbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Samuel Holland <samuel@sholland.org>
13 The hardware message box on sun6i, sun8i, sun9i, and sun50i SoCs is a
14 two-user mailbox controller containing 8 unidirectional FIFOs. An interrupt
17 hold four 32-bit messages; when a FIFO is full, clients must wait before
20 Refer to ./mailbox.txt for generic information about mailbox device-tree
26 - items:
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/linux/Documentation/devicetree/bindings/crypto/
H A Dallwinner,sun8i-ss.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/crypto/allwinner,sun8i-ss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Corentin Labbe <corentin.labbe@gmail.com>
15 - allwinner,sun8i-a83t-crypto
16 - allwinner,sun9i-a80-crypto
26 - description: Bus clock
27 - description: Module clock
29 clock-names:
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/linux/arch/arm/mach-sunxi/
H A Dmc_smp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 Chen-Yu Tsai
5 * Chen-Yu Tsai <wens@csie.org>
7 * arch/arm/mach-sunxi/mc_smp.c
9 * Based on Allwinner code, arch/arm/mach-exynos/mcpm-exynos.c, and
10 * arch/arm/mach-hisi/platmcpm.c
14 #include <linux/arm-cci.h>
19 #include <linux/irqchip/arm-gic.h>
63 /* The power off register for clusters are different from a80 and a83t */
70 /* R_CPUCFG registers, specific to sun8i-a83t */
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/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h616.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h616-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/clock/sun6i-rtc.h>
10 #include <dt-bindings/reset/sun50i-h616-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
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