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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dallwinner,sun4i-a10-ic.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun4i-a10-ic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Interrupt Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 - $ref: /schemas/interrupt-controller.yaml#
17 "#interrupt-cells":
22 - allwinner,sun4i-a10-ic
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/linux/Documentation/arch/arm/
H A Dsunxi.rst10 ------------
11 Linux kernel mach directory: arch/arm/mach-sunxi
16 - Allwinner F20 (sun3i)
20 * ARM Cortex-A8 based SoCs
21 - Allwinner A10 (sun4i)
25 http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf
28 …http://dl.linux-sunxi.org/A10/A10%20User%20Manual%20-%20v1.20%20%282012-04-09%2c%20DECRYPTED%29.pdf
30 - Allwinner A10s (sun5i)
34 http://dl.linux-sunxi.org/A10s/A10s%20Datasheet%20-%20v1.20%20%282012-03-27%29.pdf
36 - Allwinner A13 / R8 (sun5i)
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/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun5i-ccu.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
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H A Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
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/linux/drivers/irqchip/
H A Dirq-sun4i.c6 * Maxime Ripard <maxime.ripard@free-electrons.com>
31 #define SUN4I_IRQ_ENABLE_REG(data, x) ((data)->enable_reg_offset + 0x4 * x)
32 #define SUN4I_IRQ_MASK_REG(data, x) ((data)->mask_reg_offset + 0x4 * x)
56 writel(BIT(0), irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(0)); in sun4i_irq_ack()
66 val = readl(irq_ic_data->irq_base + in sun4i_irq_mask()
69 irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, reg)); in sun4i_irq_mask()
79 val = readl(irq_ic_data->irq_base + in sun4i_irq_unmask()
82 irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, reg)); in sun4i_irq_unmask()
110 irq_ic_data->irq_base = of_iomap(node, 0); in sun4i_of_init()
111 if (!irq_ic_data->irq_base) in sun4i_of_init()
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/linux/drivers/rtc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
141 once-per-second update interrupts, used for synchronization.
159 will be called rtc-test.
173 will be called rtc-88pm860x.
183 will be called rtc-88pm80x.
193 will be called rtc-88pm886.
197 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"
200 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip.
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