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/linux/fs/xfs/scrub/
H A Dbitmap.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2018-2023 Oracle. All Rights Reserved.
36 #define START(node) ((node)->bn_start)
37 #define LAST(node) ((node)->bn_last)
41 * forward-declare them anyway for clarity.
63 for ((bn) = rb_entry_safe(rb_first(&(bitmap)->xb_root.rb_root), \ in INTERVAL_TREE_DEFINE()
66 (bn) = rb_entry_safe(rb_next(&(bn)->bn_rbnode), \
78 uint64_t last = start + len - 1;
80 while ((bn = xbitmap64_tree_iter_first(&bitmap->xb_root, start, last))) {
81 if (bn->bn_start < start && bn->bn_last > last) {
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/linux/include/linux/mfd/
H A Drohm-bd957x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
17 * The BD9576 has own IRQ 'blocks' for:
18 * - I2C/thermal,
19 * - Over voltage protection
20 * - Short-circuit protection
21 * - Over current protection
22 * - Over voltage detection
23 * - Under voltage detection
24 * - Under voltage protection
25 * - 'system interrupt'.
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/linux/arch/x86/crypto/
H A Daes-ctr-avx-x86_64.S1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
7 // This file is dual-licensed, meaning that you can use it under your choice of
13 // http://www.apache.org/licenses/LICENSE-2.0
45 //------------------------------------------------------------------------------
47 // This file contains x86_64 assembly implementations of AES-CTR and AES-XCTR
49 // - AES-NI && AVX
50 // - VAES && AVX2
51 // - VAES && AVX512BW && AVX512VL && BMI2
95 // Broadcast a 128-bit value from memory to all 128-bit lanes of a vector
119 sub $8, %ecx // LEN - 8
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H A Daes-xts-avx-x86_64.S1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // AES-XTS for modern x86_64 CPUs
9 //------------------------------------------------------------------------------
11 // This file is dual-licensed, meaning that you can use it under your choice of
17 // http://www.apache.org/licenses/LICENSE-2.0
50 * This file implements AES-XTS for modern x86_64 CPUs. To handle the
55 * AES-NI && AVX
56 * - 128-bit vectors (1 AES block per vector)
57 * - VEX-coded instructions
58 * - xmm0-xmm15
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/linux/arch/arm/crypto/
H A Daes-neonbs-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * 'Faster and Timing-Attack Resistant AES-GCM' by Emilia Kaesper and
15 * for 32-bit ARM written by Andy Polyakov <appro@openssl.org>
262 vld1.8 {\t0-\t1}, [bskey, :256]!
264 vld1.8 {\t2-\t3}, [bskey, :256]!
269 vld1.8 {\t0-\t1}, [bskey, :256]!
273 vld1.8 {\t2-\t3}, [bskey, :256]!
354 vld1.8 {\t0-\t1}, [bskey, :256]!
356 vld1.8 {\t2-\t3}, [bskey, :256]!
358 vld1.8 {\t4-\t5}, [bskey, :256]!
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H A Daes-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * aes-ce-core.S - AES in CBC/CTR/XTS mode using ARMv8 Crypto Extensions
12 .arch armv8-a
13 .fpu crypto-neon-fp-armv8
102 vld1.32 {q10-q11}, [ip]!
104 vld1.32 {q12-q13}, [ip]!
106 vld1.32 {q10-q11}, [ip]!
108 vld1.32 {q12-q13}, [ip]!
110 blo 0f @ AES-128: 10 rounds
111 vld1.32 {q10-q11}, [ip]!
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/linux/lib/zstd/compress/
H A Dzstd_compress_superblock.c1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 * This source code is licensed under both the BSD-style license (found in the
9 * You may select, at your option, one of the above-listed licenses.
12 /*-*************************************
24 * Compresses literals section for a sub-block.
33 * hufMetadata->hType has literals block type info.
34 * If it is set_basic, all sub-blocks literals section will be Raw_Literals_Block.
35 * If it is set_rle, all sub-blocks literals section will be RLE_Literals_Block.
36 …* If it is set_compressed, first sub-block's literals section will be Compressed_Literals_Blo…
37 * If it is set_compressed, first sub-block's literals section will be Treeless_Literals_Block
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/linux/lib/crypto/x86/
H A Dsha256-ni-asm.S2 * Intel SHA Extensions optimized implementation of a SHA-256 update function
83 movdqa (\i-32)*4(SHA256CONSTANTS), MSG
100 * Intel SHA Extensions optimized implementation of a SHA-256 block function
102 * This function takes a pointer to the current SHA-256 state, a pointer to the
103 * input data, and the number of 64-byte blocks to process. Once all blocks
105 * only processes complete blocks. State initialization, buffering of partial
106 * blocks, and digest finalization is expected to be handled elsewhere.
120 * DCBA, HGFE -> ABEF, CDGH
223 // Do 4 rounds of SHA-256 for each of two messages (interleaved). m0_a and m0_b
228 // computes 4 more message schedule words for each message. m1_a-m3_a contain
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H A Dchacha-avx512vl-x86_64.S1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * ChaCha 256-bit cipher algorithm, x64 AVX-512VL functions
29 # %rsi: up to 2 data blocks output, o
30 # %rdx: up to 2 data blocks input, i
34 # This function encrypts two ChaCha blocks by loading the state
41 # x0..3[0-2] = s0..3
110 sub $2,%r8d
181 sub $1,%rax
194 # %rsi: up to 4 data blocks output, o
195 # %rdx: up to 4 data blocks input, i
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H A Dchacha-avx2-x86_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * ChaCha 256-bit cipher algorithm, x64 AVX2 functions
39 # %rsi: up to 2 data blocks output, o
40 # %rdx: up to 2 data blocks input, i
44 # This function encrypts two ChaCha blocks by loading the state
51 # x0..3[0-2] = s0..3
137 sub $2,%r8d
208 sub $0x10,%rsp
224 lea -8(%r10),%rsp
231 # %rsi: up to 4 data blocks output, o
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/linux/arch/riscv/crypto/
H A Daes-riscv64-zvkned-zvkb.S1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // This file is dual-licensed, meaning that you can use it under your
39 // The generated code of this file depends on the following RISC-V extensions:
40 // - RV64I
41 // - RISC-V Vector ('V') with VLEN >= 128
42 // - RISC-V Vector AES block cipher extension ('Zvkned')
43 // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
50 #include "aes-macros.S"
63 // LEN32 = number of blocks, rounded up, in 32-bit words.
68 // Create a mask that selects the last 32-bit word of each 128-bit
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H A Daes-riscv64-zvkned-zvbb-zvkg.S1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // This file is dual-licensed, meaning that you can use it under your
39 // The generated code of this file depends on the following RISC-V extensions:
40 // - RV64I
41 // - RISC-V Vector ('V') with VLEN >= 128 && VLEN < 2048
42 // - RISC-V Vector AES block cipher extension ('Zvkned')
43 // - RISC-V Vector Bit-manipulation extension ('Zvbb')
44 // - RISC-V Vector GCM/GMAC extension ('Zvkg')
51 #include "aes-macros.S"
64 // v1-v15 contain the AES round keys, but they are used for temporaries before
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/linux/Documentation/filesystems/
H A Dzonefs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ZoneFS - Zone filesystem for Zoned block devices
11 as a file. Unlike a regular POSIX-compliant file system with native zoned block
18 than to a full-featured POSIX file system. The goal of zonefs is to simplify
22 example of this approach is the implementation of LSM (log-structured merge)
31 -------------------
62 by sub-directories. This file structure is built entirely using zone information
63 provided by the device and so does not require any complex on-disk metadata
66 On-disk metadata
67 ----------------
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/linux/Documentation/devicetree/bindings/reset/
H A Dreset.txt8 Hardware blocks typically receive a reset signal. This signal is generated by
10 reset consumer (the module being reset, or a module managing when a sub-
15 specifier - a list of DT cells that represents the reset signal within the
21 in hardware for a reset signal to affect multiple logically separate HW blocks
35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
41 rst: reset-controller {
42 #reset-cells = <1>;
51 #reset-cells, then only the phandle portion of the pair will
55 reset-names: List of reset signal name strings sorted in the same order as
56 the resets property. Consumers drivers will use reset-names to
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/linux/Documentation/driver-api/media/
H A Dv4l2-intro.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ------------
8 /dev, and create also non-V4L2 devices such as DVB, ALSA, FB, I2C and input
15 called 'sub-devices'.
22 connecting to sub-devices themselves. Some of this is quite complicated
28 So this framework sets up the basic building blocks that all drivers
32 A good example to look at as a reference is the v4l2-pci-skeleton.c
38 -------------------------
44 2) A way of initializing and commanding sub-devices (if any).
47 and keeping track of device-node specific data.
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/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-c3-isp.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR MIT)
4 .. _v4l2-meta-fmt-c3isp-stats:
5 .. _v4l2-meta-fmt-c3isp-params:
17 Those statistics are obtained from the "c3-isp-stats" metadata capture video nodes,
21 The statistics collected are Auto-white balance,
22 Auto-exposure and Auto-focus information.
29 The configuration parameters are passed to the c3-isp-params metadata output video node,
31 sub-structs for each configurable area of the ISP, parameters for the C3-ISP
32 are defined as distinct structs or "blocks" which may be added to the data
34 populating the data member with the blocks that need to be configured by the driver, but
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/linux/drivers/gpu/drm/msm/
H A DNOTES4 display controller blocks at play:
5 + MDP3 - ?? seems to be what is on geeksphone peak device
6 + MDP4 - S3 (APQ8060, touchpad), S4-pro (APQ8064, nexus4 & ifc6410)
7 + MDP5 - snapdragon 800
12 Plus a handful of blocks around them for HDMI/DSI/etc output.
18 But, HDMI/DSI/etc blocks seem like they can be shared across multiple
19 display controller blocks. And I for sure don't want to have to deal
20 with N different kms devices from xf86-video-freedreno. Plus, it
27 And one or more 'struct msm_gpu' for the various different gpu sub-
38 plane -> PIPE{RGBn,VGn} \
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/linux/Documentation/devicetree/bindings/sound/
H A Dst,stm32-sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
15 The SAI contains two independent audio sub-blocks. Each sub-block has
21 - st,stm32f4-sai
22 - st,stm32h7-sai
23 - st,stm32mp25-sai
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/linux/drivers/accel/habanalabs/common/
H A Dsecurity.h1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2022 HabanaLabs, Ltd.
11 #include <linux/io-64-nonatomic-lo-hi.h>
15 /* special blocks */
23 * struct hl_special_block_info - stores address details of a particular type of
29 * @major: number of major blocks of particular type.
30 * @minor: number of minor blocks of particular type.
31 * @sub_minor: number of sub minor blocks of particular type.
32 * @major_offset: address gap between 2 consecutive major blocks of particular type,
34 * @minor_offset: address gap between 2 consecutive minor blocks of particular type,
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/linux/Documentation/admin-guide/media/
H A Dqcom_camss.rst1 .. SPDX-License-Identifier: GPL-2.0
9 ------------
25 ----------------------------------
30 - 2 / 3 CSIPHY modules. They handle the Physical layer of the CSI2 receivers.
32 - 2 / 4 CSID (CSI Decoder) modules. They handle the Protocol and Application
36 - ISPIF (ISP Interface) module. Handles the routing of the data streams from
38 - 1 / 2 VFE (Video Front End) module(s). Contain a pipeline of image processing
39 hardware blocks. The VFE has different input interfaces. The PIX (Pixel) input
48 -----------------------
52 - Input from camera sensor via CSIPHY;
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/linux/arch/sparc/lib/
H A DM7memset.S15 * Fast assembler language version of the following C-program for memset
16 * which represents the `standard' for the C-library.
25 * } while (--n != 0);
35 * Then store as many 4-byte chunks, followed by trailing bytes.
39 * store 8-bytes chunks to align the address on 64 byte boundary
42 * 64-byte cache line to zero which will also clear the
49 * In the main loop, continue pre-setting the first long
56 * store remaining data in 64-byte chunks until less than
59 * Store as many 8-byte chunks, followed by trailing bytes.
109 .size M7clear_page,.-M7clear_page
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/linux/tools/lib/python/kdoc/
H A Dkdoc_re.py2 # SPDX-License-Identifier: GPL-2.0
8 Those help caching regular expressions and do matching for kernel-doc.
22 regular expressions and define sub at class init time.
128 def sub(self, sub, string, count=0):
130 Alias to re.sub.
133 return self.regex.sub(sub, strin
92 sub(self, sub, string, count=0) global() argument
226 sub(self, regex, sub, line, count=0) global() argument
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/linux/sound/soc/uniphier/
H A Daio.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (c) 2016-2018 Socionext Inc.
15 #include <sound/soc-dai.h>
43 /* IEC61937 Repetition period of data-burst in IEC60958 frames */
52 /* IEC61937 Repetition period of Pause data-burst in IEC60958 frames */
70 #define AUD_NAME_PCMIN1 "aio-pcmin1"
71 #define AUD_NAME_PCMIN2 "aio-pcmin2"
72 #define AUD_NAME_PCMIN3 "aio-pcmin
269 struct uniphier_aio_sub sub[2]; global() member
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/linux/arch/sparc/include/asm/
H A Dbackoff.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * completion of the compare-and-swap instruction. Heavily
24 * On all cpus prior to SPARC-T4 we do three dummy reads of the
25 * condition code register. Each read blocks the strand for something
28 * For SPARC-T4 and later we have a special "pause" instruction
31 * unless a disrupting trap happens first. SPARC-T4 specifically
36 * chip blocks for 1 cycle.
67 sub tmp, 1, tmp; \
/linux/Documentation/userspace-api/media/
H A Dglossary.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
58 **Field-programmable Gate Array**
63 See https://en.wikipedia.org/wiki/Field-programmable_gate_array.
72 together make a larger user-facing functional peripheral. For
80 **Inter-Integrated Circuit**
82 A multi-master, multi-slave, packet switched, single-ended,
84 like sub-device hardware components.
86 See http://www.nxp.com/docs/en/user-guide/UM10204.pdf.
102 IP Blocks may be licensed to another party or can be owned
120 - :term:`CEC API`;
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