Searched +full:stm32mp25 +full:- +full:dma3 (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/dma/stm32/ |
| H A D | st,stm32-dma3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DMA3 Controller
10 The STM32 DMA3 is a direct memory access controller with different features
19 Bindings are generic for these 3 STM32 DMA3 configurations.
21 DMA clients connected to the STM32 DMA3 controller must use the format
22 described in "#dma-cells" property description below, using a three-cell
26 - Amelie Delaunay <amelie.delaunay@foss.st.com>
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| /linux/arch/arm64/boot/dts/st/ |
| H A D | stm32mp251.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
9 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
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| /linux/drivers/dma/stm32/ |
| H A D | stm32-dma3.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * STM32 DMA3 controller driver
11 #include <linux/dma-mapping.h>
24 #include "../virt-dma.h"
56 /* MISR DMA non-secure/secure masked interrupt status register */
140 CTR1_PAM_0S_LT, /* if DDW > SDW, padded with 0s else left-truncated */
141 CTR1_PAM_SE_RT, /* if DDW > SDW, sign extended else right-truncated */
163 /* CxLLR DMA channel x linked-list address register */
192 AXI64, /* 1x AXI: 64-bit port 0 */
193 AHB32, /* 1x AHB: 32-bit port 0 */
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