| /linux/Documentation/devicetree/bindings/arm/stm32/ |
| H A D | stm32.yaml | 17 - description: emtrion STM32MP1 Argon based Boards
136 - description: DH STM32MP1 SoM based Boards
143 - description: DH STM32MP1 SoM based Boards
151 - description: Engicam i.Core STM32MP1 SoM based Boards
154 - engicam,icore-stm32mp1-ctouch2 # STM32MP1 Engicam i.Core STM32MP1 C.TOUCH 2.0
155 … - engicam,icore-stm32mp1-ctouch2-of10 # STM32MP1 Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF
156 … - engicam,icore-stm32mp1-edimm2.2 # STM32MP1 Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
157 - const: engicam,icore-stm32mp1 # STM32MP1 Engicam i.Core STM32MP1 SoM
160 - description: Engicam MicroGEA STM32MP1 SoM based Boards
163 - engicam,microgea-stm32mp1-microdev2.0
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | st,stm32-adc.yaml | 29 - st,stm32mp1-adc-core
39 - stm32mp1 has two separate interrupt lines, one for each ADC within
52 It's optional on stm32h7 and stm32mp1.
55 It's required on stm32h7 and stm32mp1.
74 analog input switches on stm32h7 and stm32mp1.
79 input switches on stm32mp1.
84 analog circuitry on stm32mp1.
167 const: st,stm32mp1-adc-core
245 - st,stm32mp1-adc
290 - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1
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| H A D | st,stm32-dfsdm-adc.yaml | 21 up to 4 filters on stm32h7 or 6 filters on stm32mp1.
29 - st,stm32mp1-dfsdm
98 On stm32h7 and stm32mp1:
348 const: st,stm32mp1-dfsdm
362 #include <dt-bindings/clock/stm32mp1-clks.h>
364 compatible = "st,stm32mp1-dfsdm";
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| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | st,stm32mp1-pwr-reg.yaml | 4 $id: http://devicetree.org/schemas/regulator/st,stm32mp1-pwr-reg.yaml#
7 title: STM32MP1 PWR voltage regulators
16 - const: st,stm32mp1,pwr-reg
19 - const: st,stm32mp1,pwr-reg
45 compatible = "st,stm32mp1,pwr-reg";
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| H A D | st,stm32-booster.yaml | 23 - st,stm32mp1-booster
42 compatible = "st,stm32mp1-booster";
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp157a-icore-stm32mp1-ctouch2.dts | 10 #include "stm32mp157a-icore-stm32mp1.dtsi"
16 model = "Engicam i.Core STM32MP1 C.TOUCH 2.0";
17 compatible = "engicam,icore-stm32mp1-ctouch2",
18 "engicam,icore-stm32mp1", "st,stm32mp157";
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| H A D | stm32mp157a-microgea-stm32mp1-microdev2.0.dts | 10 #include "stm32mp157a-microgea-stm32mp1.dtsi"
16 model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 Carrier Board";
17 compatible = "engicam,microgea-stm32mp1-microdev2.0",
18 "engicam,microgea-stm32mp1", "st,stm32mp157";
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| H A D | stm32mp157a-icore-stm32mp1-ctouch2-of10.dts | 10 #include "stm32mp157a-icore-stm32mp1.dtsi"
16 model = "Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1\" Open Frame";
17 compatible = "engicam,icore-stm32mp1-ctouch2-of10",
18 "engicam,icore-stm32mp1", "st,stm32mp157";
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| H A D | stm32mp157a-icore-stm32mp1-edimm2.2.dts | 10 #include "stm32mp157a-icore-stm32mp1.dtsi"
16 model = "Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit";
17 compatible = "engicam,icore-stm32mp1-edimm2.2",
18 "engicam,icore-stm32mp1", "st,stm32mp157";
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| H A D | stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts | 10 #include "stm32mp157a-microgea-stm32mp1.dtsi"
16 model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 7\" Open Frame";
17 compatible = "engicam,microgea-stm32mp1-microdev2.0-of7",
18 "engicam,microgea-stm32mp1", "st,stm32mp157";
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| H A D | stm32mp157c-phycore-stm32mp1-3.dts | 16 model = "PHYTEC phyCORE-STM32MP1-3 Dev Board";
17 compatible = "phytec,phycore-stm32mp1-3",
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| /linux/Documentation/devicetree/bindings/crypto/ |
| H A D | st,stm32-cryp.yaml | 22 - st,stm32mp1-cryp
64 #include <dt-bindings/clock/stm32mp1-clks.h>
65 #include <dt-bindings/reset/stm32mp1-resets.h>
67 compatible = "st,stm32mp1-cryp";
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| H A D | st,stm32-hash.yaml | 81 #include <dt-bindings/clock/stm32mp1-clks.h>
82 #include <dt-bindings/reset/stm32mp1-resets.h>
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | st,stm32-fmc2-ebi.yaml | 27 - st,stm32mp1-fmc2-ebi
76 #include <dt-bindings/clock/stm32mp1-clks.h>
77 #include <dt-bindings/reset/stm32mp1-resets.h>
81 compatible = "st,stm32mp1-fmc2-ebi";
106 compatible = "st,stm32mp1-fmc2-nfc";
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| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | st,stm32-iwdg.yaml | 20 - st,stm32mp1-iwdg
55 #include <dt-bindings/clock/stm32mp1-clks.h>
57 compatible = "st,stm32mp1-iwdg";
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| /linux/Documentation/devicetree/bindings/mtd/ |
| H A D | st,stm32-fmc2-nand.yaml | 16 - st,stm32mp1-fmc2-nfc
84 const: st,stm32mp1-fmc2-nfc
128 #include <dt-bindings/clock/stm32mp1-clks.h>
129 #include <dt-bindings/reset/stm32mp1-resets.h>
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | stm32-dwmac.yaml | 24 - st,stm32mp1-dwmac
39 - st,stm32mp1-dwmac
140 - st,stm32mp1-dwmac
165 #include <dt-bindings/clock/stm32mp1-clks.h>
168 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
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| /linux/Documentation/devicetree/bindings/rtc/ |
| H A D | st,stm32-rtc.yaml | 17 - st,stm32mp1-rtc
123 - st,stm32mp1-rtc
163 #include <dt-bindings/clock/stm32mp1-clks.h>
165 compatible = "st,stm32mp1-rtc";
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | st,stm32-ipcc.yaml | 21 const: st,stm32mp1-ipcc
63 #include <dt-bindings/clock/stm32mp1-clks.h>
65 compatible = "st,stm32mp1-ipcc";
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | st,stm32-exti.yaml | 22 - st,stm32mp1-exti
86 compatible = "st,stm32mp1-exti", "syscon";
96 compatible = "st,stm32mp1-exti", "syscon";
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| /linux/Documentation/devicetree/bindings/reset/ |
| H A D | st,stm32mp1-rcc.txt | 1 STMicroelectronics STM32MP1 Peripheral Reset Controller
6 Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml
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| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | st,stm32-i2c.yaml | 112 For STM32F7, STM32H7 and STM32MP1 SoCs, if timing parameters
179 #include <dt-bindings/clock/stm32mp1-clks.h>
180 #include <dt-bindings/reset/stm32mp1-resets.h>
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | phy-stm32-usbphyc.yaml | 31 const: st,stm32mp1-usbphyc
241 #include <dt-bindings/clock/stm32mp1-clks.h>
242 #include <dt-bindings/reset/stm32mp1-resets.h>
244 compatible = "st,stm32mp1-usbphyc";
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | st,stm32-qspi.yaml | 65 #include <dt-bindings/clock/stm32mp1-clks.h>
66 #include <dt-bindings/reset/stm32mp1-resets.h>
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| /linux/Documentation/devicetree/bindings/media/ |
| H A D | st,stm32-dcmi.yaml | 96 #include <dt-bindings/clock/stm32mp1-clks.h>
98 #include <dt-bindings/reset/stm32mp1-resets.h>
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