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12

/linux/Documentation/devicetree/bindings/crypto/
H A Dst,stm32-cryp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/st,stm32-cryp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Lionel Debieve <lionel.debieve@foss.st.com>
19 - st,stn8820-cryp
20 - stericsson,ux500-cryp
21 - st,stm32f756-cryp
22 - st,stm32mp1-cryp
33 resets:
[all …]
H A Dst,stm32-hash.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Lionel Debieve <lionel.debieve@foss.st.com>
19 - st,stn8820-hash
20 - stericsson,ux500-hash
21 - st,stm32f456-hash
22 - st,stm32f756-hash
23 - st,stm32mp13-hash
[all …]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dst,stm32-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/st,stm32-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Fabien Dessenne <fabien.dessenne@foss.st.com>
15 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
19 const: st,stm32mp1-m4
27 resets:
31 reset-names:
33 - const: mcu_rst
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dst,stm32-fmc2-ebi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 asynchronous static devices (such as PSNOR, PSRAM or other memory-mapped
14 - to translate AXI transactions into the appropriate external device
16 - to meet the access time requirements of the external devices
22 - Christophe Kerello <christophe.kerello@foss.st.com>
27 - st,stm32mp1-fmc2-ebi
28 - st,stm32mp25-fmc2-ebi
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Dst,stm32-fmc2-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
15 - st,stm32mp15-fmc2
16 - st,stm32mp1-fmc2-nfc
17 - st,stm32mp25-fmc2-nfc
28 - description: tx DMA channel
29 - description: rx DMA channel
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
21 - st,stm32mp15-i2c
[all …]
/linux/Documentation/devicetree/bindings/display/
H A Dst,stm32-ltdc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-ltdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 lcd-tft display controller
10 - Philippe Cornu <philippe.cornu@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
15 const: st,stm32-ltdc
22 - description: events interrupt line.
23 - description: errors interrupt line.
[all …]
H A Dst,stm32-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philippe Cornu <philippe.cornu@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
17 - $ref: dsi-controller.yaml#
21 const: st,stm32-dsi
28 - description: Module Clock
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Dst,stm32-dcmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hugues Fruchet <hugues.fruchet@foss.st.com>
14 const: st,stm32-dcmi
25 clock-names:
27 - const: mclk
32 dma-names:
34 - const: tx
[all …]
/linux/Documentation/devicetree/bindings/spi/
H A Dst,stm32-qspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Patrice Chotard <patrice.chotard@foss.st.com>
14 - $ref: spi-controller.yaml#
18 const: st,stm32f469-qspi
22 - description: registers
23 - description: memory mapping
[all …]
H A Dst,stm32-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 the Serial Peripheral Interface. It supports full-duplex, half-duplex and
13 from 4 to 32-bit data size.
16 - Erwan Leray <erwan.leray@foss.st.com>
17 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
20 - $ref: spi-controller.yaml#
25 - st,stm32f4-spi
[all …]
/linux/Documentation/devicetree/bindings/dma/stm32/
H A Dst,stm32-dmamux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dmamu
[all...]
H A Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
32 0x1: half-word (16bit)
[all …]
H A Dst,stm32-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a four-cell specifier for each
19 -bit 9: Peripheral Increment Address
22 -bit 10: Memory Increment Address
25 -bit 15: Peripheral Increment Offset Size
27 0x1: offset size is fixed to 4 (32-bit alignment)
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dphy-stm32-usbphyc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 |_ PHY port#2 ----| |________________
27 - Amelie Delaunay <amelie.delaunay@foss.st.com>
31 const: st,stm32mp1-usbphyc
39 resets:
42 "#address-cells":
45 "#size-cells":
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-dk2-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-dk2.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
14 compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
34 resets = <&scmi_reset RST_SCMI_CRYP1>;
[all …]
H A Dstm32mp157c-ed1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-ed1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
14 compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
34 resets = <&scmi_reset RST_SCMI_CRYP1>;
[all …]
H A Dstm32mp157a-dk1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157a-dk1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
14 compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
42 resets = <&scmi_reset RST_SCMI_HASH1>;
[all …]
H A Dstm32mp157c-ev1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-ev1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
14 compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";
16 reserved-memory {
19 no-map;
34 resets = <&scmi_reset RST_SCMI_CRYP1>;
[all …]
H A Dstm32mp13xc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
9 compatible = "st,stm32mp1-cryp";
13 resets = <&rcc CRYP1_R>;
14 access-controllers = <&etzpc 42>;
H A Dstm32mp15xc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
9 compatible = "st,stm32mp1-cryp";
13 resets = <&rcc CRYP1_R>;
14 access-controllers = <&etzpc 9>;
H A Dstm32mp13xf.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
9 compatible = "st,stm32mp1-cryp";
13 resets = <&rcc CRYP1_R>;
14 access-controllers = <&etzpc 42>;
/linux/Documentation/devicetree/bindings/timer/
H A Dst,stm32-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/st,stm32-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Patrice Chotard <patrice.chotard@foss.st.com>
15 const: st,stm32-timer
26 resets:
30 - compatible
[all …]
/linux/Documentation/devicetree/bindings/iio/dac/
H A Dst,stm32-dac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/dac/st,stm32-dac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DAC is a 12-bit voltage output digital-to-analog converter. The DAC
11 may be configured in 8 or 12-bit mode. It has two output channels, each with
13 It has built-in noise and triangle waveform generator and supports external
18 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
23 - st,stm32f4-dac-core
24 - st,stm32h7-dac-core
[all …]
/linux/Documentation/devicetree/bindings/serial/
H A Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
28 resets:
34 st,hw-flow-ctrl:
[all …]

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