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12

/linux/Documentation/devicetree/bindings/clock/
H A Dst,stm32mp1-rcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32MP1 Reset Clock Controller
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
13 The RCC IP is both a reset and a clock controller.
14 RCC makes also power management (resume/supend and wakeup interrupt).
18 Documentation/devicetree/bindings/clock/clock-bindings.txt
24 dt-bindings/clock/stm32mp1-clks.h header and can be used in device
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/linux/Documentation/devicetree/bindings/net/
H A Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
25 - st,stm32mp13-dwmac
26 - st,stm32mp25-dwmac
[all …]
/linux/Documentation/devicetree/bindings/rtc/
H A Dst,stm32-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
15 - st,stm32-rtc
16 - st,stm32h7-rtc
17 - st,stm32mp1-rtc
18 - st,stm32mp25-rtc
27 clock-names:
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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
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H A Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
21 up to 4 filters on stm32h7 or 6 filters on stm32mp1.
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/linux/Documentation/devicetree/bindings/i2c/
H A Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
21 - st,stm32mp15-i2c
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/linux/Documentation/devicetree/bindings/crypto/
H A Dst,stm32-cryp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/st,stm32-cryp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Lionel Debieve <lionel.debieve@foss.st.com>
19 - st,stn8820-cryp
20 - stericsson,ux500-cryp
21 - st,stm32f756-cryp
22 - st,stm32mp1-cryp
38 - description: mem2cryp DMA channel
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H A Dst,stm32-hash.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Lionel Debieve <lionel.debieve@foss.st.com>
19 - st,stn8820-hash
20 - stericsson,ux500-hash
21 - st,stm32f456-hash
22 - st,stm32f756-hash
23 - st,stm32mp13-hash
[all …]
/linux/Documentation/devicetree/bindings/watchdog/
H A Dst,stm32-iwdg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/st,stm32-iwdg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yannick Fertre <yannick.fertre@foss.st.com>
11 - Christophe Roullier <christophe.roullier@foss.st.com>
14 - $ref: watchdog.yaml#
19 - st,stm32-iwdg
20 - st,stm32mp1-iwdg
27 - description: Low speed clock
[all …]
/linux/Documentation/devicetree/bindings/reset/
H A Dst,stm32mp1-rcc.txt1 STMicroelectronics STM32MP1 Peripheral Reset Controller
4 The RCC IP is both a reset and a clock controller.
6 Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dst,stm32-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/st,stm32-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Fabien Dessenne <fabien.dessenne@foss.st.com>
15 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
19 const: st,stm32mp1-m4
31 reset-names:
33 - const: mcu_rst
34 - const: hold_boot
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dst,stm32-fmc2-ebi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 asynchronous static devices (such as PSNOR, PSRAM or other memory-mapped
14 - to translate AXI transactions into the appropriate external device
16 - to meet the access time requirements of the external devices
22 - Christophe Kerello <christophe.kerello@foss.st.com>
27 - st,stm32mp1-fmc2-ebi
28 - st,stm32mp25-fmc2-ebi
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Dst,stm32-fmc2-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
15 - st,stm32mp15-fmc2
16 - st,stm32mp1-fmc2-nfc
17 - st,stm32mp25-fmc2-nfc
28 - description: tx DMA channel
29 - description: rx DMA channel
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/linux/arch/arm/boot/dts/st/
H A Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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H A Dstm32mp157c-ev1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-ev1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
14 compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";
16 reserved-memory {
19 no-map;
38 phy-dsi-supply = <&scmi_reg18>;
[all …]
H A Dstm32mp157a-dk1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157a-dk1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
14 compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
33 clocks = <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
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H A Dstm32mp157c-dk2-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-dk2.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
14 compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
38 phy-dsi-supply = <&scmi_reg18>;
[all …]
H A Dstm32mp157c-ed1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-ed1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
14 compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
38 clocks = <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
[all …]
H A Dstm32mp13xc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
9 compatible = "st,stm32mp1-cryp";
12 clocks = <&rcc CRYP1>;
13 resets = <&rcc CRYP1_R>;
14 access-controllers = <&etzpc 42>;
H A Dstm32mp15xc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
9 compatible = "st,stm32mp1-cryp";
12 clocks = <&rcc CRYP1>;
13 resets = <&rcc CRYP1_R>;
14 access-controllers = <&etzpc 9>;
/linux/Documentation/devicetree/bindings/display/
H A Dst,stm32-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philippe Cornu <philippe.cornu@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
17 - $ref: dsi-controller.yaml#
21 const: st,stm32-dsi
28 - description: Module Clock
[all …]
H A Dst,stm32-ltdc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-ltdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 lcd-tft display controller
10 - Philippe Cornu <philippe.cornu@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
15 const: st,stm32-ltdc
22 - description: events interrupt line.
23 - description: errors interrupt line.
[all …]
/linux/Documentation/devicetree/bindings/spi/
H A Dst,stm32-qspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Patrice Chotard <patrice.chotard@foss.st.com>
14 - $ref: spi-controller.yaml#
18 const: st,stm32f469-qspi
22 - description: registers
23 - description: memory mapping
[all …]
H A Dst,stm32-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 the Serial Peripheral Interface. It supports full-duplex, half-duplex and
13 from 4 to 32-bit data size.
16 - Erwan Leray <erwan.leray@foss.st.com>
17 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
20 - $ref: spi-controller.yaml#
25 - st,stm32f4-spi
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Dst,stm32-dcmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hugues Fruchet <hugues.fruchet@foss.st.com>
14 const: st,stm32-dcmi
25 clock-names:
27 - const: mclk
32 dma-names:
34 - const: tx
[all …]

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