Home
last modified time | relevance | path

Searched +full:step +full:- +full:size (Results 1 – 25 of 1179) sorted by relevance

12345678910>>...48

/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DMD5.cpp4 * This is an OpenSSL-compatible implementation of the RSA Data Security, Inc.
5 * MD5 Message-Digest Algorithm (RFC 1321).
8 * http://openwall.info/wiki/people/solar/software/public-domain-source-code/md5
25 * (This is a heavily cut-down "BSD license".)
28 * no exactly 32-bit integer data type is required (any 32-bit or wider
29 * unsigned integer data type will do), there's no compile-time endianness
36 * optimizations are not included to reduce source code size and avoid
37 * compile-time configuration.
53 // architectures that lack an AND-NOT instruction, just like in Colin Plumb's
61 #define STEP(f, a, b, c, d, x, t, s) \ macro
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
H A Dtsan_md5.cpp1 //===-- tsan_md5.cpp ------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
21 #define STEP(f, a, b, c, d, x, t, s) \ macro
23 (a) = (((a) << (s)) | (((a) & 0xffffffff) >> (32 - (s)))); \
41 static const void *body(MD5_CTX *ctx, const void *data, ulong_t size) { in body() argument
46 a = ctx->a; in body()
47 b = ctx->b; in body()
48 c = ctx->c; in body()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DDelinearization.h1 //===---- Delinearization.h - MultiDimensional Index Delinearization ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 // use the on-demand SCEVAddRecExpr::delinearize() function.
14 //===----------------------------------------------------------------------===//
30 /// the memory access function of this SCEVAddRecExpr (second step of
37 /// Collect parametric terms occurring in step expressions (first step of
43 /// (third step of delinearization).
50 /// The delinearization is a 3 step process: the first two steps compute the
51 /// sizes of each subscript and the third step computes the access functions
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dhisi504-nand.txt5 - compatible: Should be "hisilicon,504-nfc".
6 - reg: The first contains base physical address and size of
8 physical address and size of NAND controller's buffer.
9 - interrupts: Interrupt number for nfc.
10 - nand-bus-width: See nand-controller.yaml.
11 - nand-ecc-mode: Support none and hw ecc mode.
12 - #address-cells: Partition address, should be set 1.
13 - #size-cells: Partition size, should be set 1.
17 - nand-ecc-strength: Number of bits to correct per ECC step.
18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
[all …]
H A Dmtk-nand.txt15 - compatible: Should be one of
16 "mediatek,mt2701-nfc",
17 "mediatek,mt2712-nfc",
18 "mediatek,mt7622-nfc".
19 - reg: Base physical address and size of NFI.
20 - interrupts: Interrupts of NFI.
21 - clocks: NFI required clocks.
22 - clock-names: NFI clocks internal name.
23 - ecc-engine: Required ECC Engine node.
24 - #address-cells: NAND chip index, should be 1.
[all …]
H A Dmediatek,mtk-nfc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
15 - mediatek,mt2701-nfc
16 - mediatek,mt2712-nfc
17 - mediatek,mt7622-nfc
21 - description: Base physical address and size of NFI.
25 - description: NFI interrupt
[all …]
H A Dvf610-nfc.txt7 - compatible: Should be set to "fsl,vf610-nfc".
8 - reg: address range of the NFC.
9 - interrupts: interrupt of the NFC.
10 - #address-cells: shall be set to 1. Encode the nand CS.
11 - #size-cells : shall be set to 0.
12 - assigned-clocks: main clock from the SoC, for Vybrid <&clks VF610_CLK_NFC>;
13 - assigned-clock-rates: The NAND bus timing is derived from this clock
19 - #address-cells, #size-cells : Must be present if the device has sub-nodes
27 - compatible: Should be set to "fsl,vf610-nfc-cs".
28 - nand-bus-width: see nand-controller.yaml
[all …]
H A Dmarvell-nand.txt4 - compatible: can be one of the following:
5 * "marvell,armada-8k-nand-controller"
6 * "marvell,armada370-nand-controller"
7 * "marvell,pxa3xx-nand-controller"
8 * "marvell,armada-8k-nand" (deprecated)
9 * "marvell,armada370-nand" (deprecated)
10 * "marvell,pxa3xx-nand" (deprecated)
13 - reg: NAND flash controller memory area.
14 - #address-cells: shall be set to 1. Encode the NAND CS.
15 - #size-cells: shall be set to 0.
[all …]
H A Dbrcm,brcmnand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <computersforpeace@gmail.com>
11 - Kamal Dasu <kdasu.kdev@gmail.com>
14 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
15 flash chips. It has a memory-mapped register interface for both control
25 -- Additional SoC-specific NAND controller properties --
33 interesting ways, sometimes with registers that lump multiple NAND-related
42 - items:
[all …]
H A Ddenali,nand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - altr,socfpga-denali-nand
16 - socionext,uniphier-denali-nand-v5a
17 - socionext,uniphier-denali-nand-v5b
19 reg-names:
25 - const: nand_data
26 - const: denali_reg
[all …]
H A Dbrcm,brcmnand.txt3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
4 flash chips. It has a memory-mapped register interface for both control
15 - compatible : May contain an SoC-specific compatibility string (see below)
16 to account for any SoC-specific hardware bits that may be
21 string, like "brcm,brcmnand-v7.0"
23 brcm,brcmnand-v2.1
24 brcm,brcmnand-v2.2
25 brcm,brcmnand-v4.0
26 brcm,brcmnand-v5.0
27 brcm,brcmnand-v6.0
[all …]
H A Dtango-nand.txt5 - compatible: "sigma,smp8758-nand"
6 - reg: address/size of nfc_reg, nfc_mem, and pbus_reg
7 - dmas: reference to the DMA channel used by the controller
8 - dma-names: "rxtx"
9 - clocks: reference to the system clock
10 - #address-cells: <1>
11 - #size-cells: <0>
14 See Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
18 nandc: nand-controller@2c000 {
19 compatible = "sigma,smp8758-nand";
[all …]
/freebsd/lib/libnv/
H A Dmsgio.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
60 /* Linux: arbitrary size, but must be lower than SCM_MAX_FD. */
61 #define PKG_MAX_SIZE ((64U - 1) * CMSG_SPACE(sizeof(int)))
64 * To work around limitations in 32-bit emulation on 64-bit kernels, use a
65 * machine-independent limit on the number of FDs per message. Each control
78 cmsg->cmsg_level = SOL_SOCKET; in msghdr_add_fd()
79 cmsg->cmsg_type = SCM_RIGHTS; in msghdr_add_fd()
80 cmsg->cmsg_len = CMSG_LEN(sizeof(fd)); in msghdr_add_fd()
114 if (recvmsg(sock, msg, flags) == -1) { in msg_recv()
[all …]
/freebsd/crypto/openssl/crypto/rsa/
H A Drsa_sp800_56b_gen.c2 * Copyright 2018-2023 The OpenSSL Project Authors. All Rights Reserved.
3 * Copyright (c) 2018-2019, Oracle and/or its affiliates. All rights reserved.
24 * Generate probable primes 'p' & 'q'. See FIPS 186-4 Section B.3.6
47 * nbits The key size in bits (The size of the modulus n).
74 Xp1 = test->Xp1; in ossl_rsa_fips186_4_gen_prob_primes()
75 Xp2 = test->Xp2; in ossl_rsa_fips186_4_gen_prob_primes()
76 Xq1 = test->Xq1; in ossl_rsa_fips186_4_gen_prob_primes()
77 Xq2 = test->Xq2; in ossl_rsa_fips186_4_gen_prob_primes()
78 Xp = test->Xp; in ossl_rsa_fips186_4_gen_prob_primes()
79 Xq = test->Xq; in ossl_rsa_fips186_4_gen_prob_primes()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCWin64EH.cpp1 //===- lib/MC/MCWin64EH.cpp - MCWin64EH implementation --------
1861 int Step = 0; tryARMPackedUnwind() local
[all...]
/freebsd/usr.sbin/diskinfo/
H A Ddiskinfo.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2003 Poul-Henning Kamp
61 fprintf(stderr, "usage: diskinfo [-ciStvw] disk ...\n" in usage()
62 " diskinfo [-l] -p disk ...\n" in usage()
63 " diskinfo [-l] -s disk ...\n" in usage()
94 while ((ch = getopt(argc, argv, "cilpsStvw")) != -1) { in main()
131 argc -= optind; in main()
138 warnx("-p or -s cannot be used with other options"); in main()
143 warnx("-S require also -w"); in main()
[all …]
/freebsd/contrib/llvm-project/lldb/source/Target/
H A DThreadPlanStepRange.cpp1 //===-- ThreadPlanStepRange.cpp -------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
29 // ThreadPlanStepRange: Step through a stack range, either stepping over or
45 m_stack_id = thread.GetStackFrameAtIndex(0)->GetStackID(); in ThreadPlanStepRange()
48 m_parent_stack_id = parent_stack->GetStackID(); in ThreadPlanStepRange()
61 error->PutCString( in ValidatePlan()
69 Log *log = GetLog(LLDBLog::Step); in ShouldReportStop()
85 // the work to disassemble this range if I don't step into it. in AddRange()
90 size_t num_ranges = m_address_ranges.size(); in DumpRanges()
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/fuzzer/
H A DFuzzerTracePC.h1 //===- FuzzerTracePC.h - Internal header for the Fuzzer ---------*- C++ -* ===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
54 void Add(const uint8_t *Data, size_t Size) { in Add()
55 if (Size <= 2) return; in Add()
56 Size = std::min(Size, Word::GetMaxSize()); in Add()
57 auto Idx = SimpleFastHash(Data, Size) % kSize; in Add()
58 MemMemWords[Idx].Set(Data, Size); in Add()
63 if (W.size()) return W; in Get()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dcs35l33.txt5 - compatible : "cirrus,cs35l33"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : gpio used to reset the amplifier
17 - interrupts : IRQ line info CS35L33.
18 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21 - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is
23 a value of 1 and will increase at a step size of 100mV until a maximum of
26 - cirrus,ramp-rate : On power up, it affects the time from when the power
27 up sequence begins to the time the audio reaches a full-scale output.
[all …]
/freebsd/crypto/openssl/crypto/bn/
H A Dbn_rsa_fips186_4.c2 * Copyright 2018-2023 The OpenSSL Project Authors. All Rights Reserved.
3 * Copyright (c) 2018-2019, Oracle and/or its affiliates. All rights reserved.
12 * According to NIST SP800-131A "Transitioning the use of cryptographic
18 * FIPS 186-4 relies on the use of the auxiliary primes p1, p2, q1 and q2 that
20 * Table B.1 in FIPS 186-4 specifies RSA modulus lengths of 2048 and
22 * FIPS 186-5 Table A.1 includes an additional entry for 4096 which has been
52 * FIPS 186-5 Table A.1. "Min length of auxiliary primes p1, p2, q1, q2".
53 * (FIPS 186-5 has an entry for >= 4096 bits).
56 * nbits The key size in bits.
58 * The minimum size of the auxiliary primes or 0 if nbits is invalid.
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DDelinearization.cpp1 //===---- Delinearization.cpp - MultiDimensional Index Delinearization ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 // use the on-demand SCEVAddRecExpr::delinearize() function.
14 //===----------------------------------------------------------------------===//
40 return isa<UndefValue>(SU->getValue()); in containsUndefs()
57 Strides.push_back(AR->getStepRecurrence(SE)); in follow()
116 // that contains the AddRec {0, +, 1}_loop. %p * %q are likely to be array size
119 // This collector expects all array size parameters to be in the same MulExpr.
134 for (const auto *Op : Mul->operands()) { in follow()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVGatherScatterLowering.cpp1 //===- RISCVGatherScatterLowering.cpp - Gather/Scatter lowering -----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // RISC-V intrinsics.
12 //===----------------------------------------------------------------------===//
32 #define DEBUG_TYPE "riscv-gather-scatter-lowering"
63 return "RISC-V gather/scatter lowering"; in getPassName()
83 "RISC-V gather/scatter lowering pass", false, false)
91 if (!isa<FixedVectorType>(StartC->getType())) in matchStridedConstant()
94 unsigned NumElts = cast<FixedVectorType>(StartC->getType())->getNumElements(); in matchStridedConstant()
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_common_libcdep.cpp1 //===-- sanitizer_common_libcdep.cpp --------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // run-time libraries.
11 //===----------------------------------------------------------------------===//
29 const uptr hard_rss_limit_mb = common_flags()->hard_rss_limit_mb; in BackgroundThread()
30 const uptr soft_rss_limit_mb = common_flags()->soft_rss_limit_mb; in BackgroundThread()
31 const bool heap_profile = common_flags()->heap_profile; in BackgroundThread()
87 if (!common_flags()->hard_rss_limit_mb && in MaybeStartBackgroudThread()
88 !common_flags()->soft_rss_limit_mb && in MaybeStartBackgroudThread()
[all …]
/freebsd/sys/dev/qlxgbe/
H A Dql_misc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2016 Qlogic Corporation
68 wnd_reg = (Q8_CRB_WINDOW_PF0 | (ha->pci_func << 2)); in ql_rdwr_indreg32()
72 while (count--) { in ql_rdwr_indreg32()
78 device_printf(ha->pci_dev, "%s: [0x%08x, 0x%08x, %d] failed\n", in ql_rdwr_indreg32()
81 return -1; in ql_rdwr_indreg32()
102 uint32_t data, step = 0; in ql_rdwr_offchip_mem() local
109 step = 1; in ql_rdwr_offchip_mem()
115 step = 2; in ql_rdwr_offchip_mem()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dtps65086.txt4 - compatible : Should be "ti,tps65086".
5 - reg : I2C slave address.
6 - interrupts : The interrupt line the device is connected to.
7 - interrupt-controller : Marks the device node as an interrupt controller.
8 - #interrupt-cells : The number of cells to describe an IRQ, should be 2.
11 masks from ../interrupt-controller/interrupts.txt.
12 - gpio-controller : Marks the device node as a GPIO Controller.
13 - #gpio-cells : Should be two. The first cell is the pin number and
16 - regulators: : List of child nodes that specify the regulator
18 after their hardware counterparts: buck[1-6],
[all …]

12345678910>>...48