Searched full:steered (Results 1 – 16 of 16) sorted by relevance
70 * enabling a clock ID. These clock can be steered independently of the
1254 * properly steered to the selected node for testing, and not by the
53 traffic to be steered to hardware/driver based traffic classes. These mappings
62 steered into.
217 Auxiliary POSIX clocks are clocks which can be steered
31 of logical flows. Packets for each flow are steered to a separate receive329 are steered using plain RPS. Multiple table entries may point to the
48 (Psock) and complete messages are steered to a KCM socket.
272 * NOTE: steered registers have multiple instances depending on the HW configuration413 * If GT has no rcs/ccs, no need to alloc steered list. in guc_capture_alloc_steered_lists()429 /* steered registers currently only exist for the render-class */ in guc_capture_alloc_steered_lists()
122 offloaded flows can be steered to TX queues based on the VLAN PCP, but the DSA
172 whose hardware counterpart the packet must be steered to (i.e. ``swp0``).
586 /* PCI MSIs cannot be steered separately to CPU cores */
805 # And that traffic for any other port is steered to the new context
632 * is programmed in the "Bit-Bang" mode. The daa will be steered to the
236 * To allow MSI to be steered to an external MSI controller (e.g., ARM
302 /* steered registers currently only exist for the render-class */ in guc_capture_alloc_steered_lists()
1908 * receive all Eth traffic which isn't steered to any QP1912 * receive all Eth multicast traffic which isn't steered to any QP