Searched full:steered (Results 1 – 10 of 10) sorted by relevance
70 * enabling a clock ID. These clock can be steered independently of the
53 traffic to be steered to hardware/driver based traffic classes. These mappings
217 Auxiliary POSIX clocks are clocks which can be steered
31 of logical flows. Packets for each flow are steered to a separate receive329 are steered using plain RPS. Multiple table entries may point to the
48 (Psock) and complete messages are steered to a KCM socket.
122 offloaded flows can be steered to TX queues based on the VLAN PCP, but the DSA
805 # And that traffic for any other port is steered to the new context
632 * is programmed in the "Bit-Bang" mode. The daa will be steered to the
302 /* steered registers currently only exist for the render-class */ in guc_capture_alloc_steered_lists()
1909 * receive all Eth traffic which isn't steered to any QP1913 * receive all Eth multicast traffic which isn't steered to any QP