Searched +full:statistical +full:- +full:profiling +full:- +full:extension +full:- +full:v1 (Results 1 – 6 of 6) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | spe-pmu.txt | 1 * ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU) 3 ARMv8.2 introduces the optional Statistical Profiling Extension for collecting 4 performance sample data using an in-memory trace buffer. 8 - compatible : should be one of: 9 "arm,statistical-profiling-extension-v1" 11 - interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where 13 the arm,gic-v3 binding for details on describing a PPI partition. 17 spe-pmu { 18 compatible = "arm,statistical-profiling-extension-v1";
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/freebsd/sys/contrib/device-tree/Bindings/perf/ |
H A D | spe-pmu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/perf/spe-pmu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU) 10 - Will Deacon <will@kernel.org> 13 ARMv8.2 introduces the optional Statistical Profiling Extension for collecting 14 performance sample data using an in-memory trace buffer. 18 const: arm,statistical-profiling-extension-v1 24 supported on a subset of the CPUs, please consult the arm,gic-v3 binding [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/arm/ |
H A D | foundation-v8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 model = "Foundation-v8A"; 16 compatible = "arm,foundation-aarch64", "arm,vexpress"; 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 31 #address-cells = <2>; 32 #size-cells = <0>; [all …]
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H A D | fvp-base-revc.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Architecture Envelope Model (AEM) ARMv8-A 11 /dts-v1/; 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 17 #include "rtsm_ve-motherboard.dtsi" 18 #include "rtsm_ve-motherboard-rs2.dtsi" 22 compatible = "arm,fvp-base-revc", "arm,vexpress"; 23 interrupt-parent = <&gic>; 24 #address-cells = <2>; 25 #size-cells = <2>; [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.td | 1 //=- AArch64InstrInfo.td - Describe the AArch64 Instructions -*- tablegen -*-=// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 14 //===----------------------------------------------------------------------===// 21 def HasV8_0a : Predicate<"Subtarget->hasV8_0aOps()">, 23 def HasV8_1a : Predicate<"Subtarget->hasV8_1aOps()">, 25 def HasV8_2a : Predicate<"Subtarget->hasV8_2aOps()">, 27 def HasV8_3a : Predicate<"Subtarget->hasV8_3aOps()">, 29 def HasV8_4a : Predicate<"Subtarget->hasV8_4aOps()">, [all …]
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/freebsd/contrib/sqlite3/ |
H A D | sqlite3.c | 17 ** language. The code for the "sqlite3" command-line shell is also in a 20 ** The content in this amalgamation comes from Fossil check-in 51 ** NO_TEST - The branches on this line are not 56 ** OPTIMIZATION-IF-TRUE - This branch is allowed to always be false 60 ** OPTIMIZATION-IF-FALSE - This branch is allowed to always be true 64 ** PREVENTS-HARMLESS-OVERREAD - This branch prevents a buffer overread 69 ** slash-asterisk...asterisk-slash comment marks, with no spaces between the 144 ** 2015-03-02 182 ** large file support, or if the OS is windows, these should be no-ops. 188 ** Large file support can be disabled using the -DSQLITE_DISABLE_LFS switch [all …]
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