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/linux/arch/mips/bcm63xx/
H A Dclk.c28 static DEFINE_MUTEX(clocks_mutex);
31 static void clk_enable_unlocked(struct clk *clk) in clk_enable_unlocked()
33 if (clk->set && (clk->usage++) == 0) in clk_enable_unlocked()
34 clk->set(clk, 1); in clk_enable_unlocked()
37 static void clk_disable_unlocked(struct clk *clk) in clk_disable_unlocked()
39 if (clk->set && (--clk->usage) == 0) in clk_disable_unlocked()
40 clk->set(clk, 0); in clk_disable_unlocked()
43 static void bcm_hwclock_set(u32 mask, int enable) in bcm_hwclock_set() argument
48 if (enable) in bcm_hwclock_set()
58 static void enet_misc_set(struct clk *clk, int enable) in enet_misc_set() argument
[all …]
/linux/arch/mips/alchemy/common/
H A Dusb.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <asm/mach-au1x00/au1000.h>
28 #define USBHEN_RD (1 << 4) /* OHCI reset-done indicator */
29 #define USBHEN_CE (1 << 3) /* OHCI block clock enable */
30 #define USBHEN_E (1 << 2) /* OHCI block enable */
32 #define USBHEN_BE (1 << 0) /* OHCI Big-Endian */
35 #define USBCFG_PFEN (1 << 31) /* prefetch enable (undoc) */
40 #define USBCFG_UCE (1 << 18) /* UDC clock enable */
41 #define USBCFG_ECE (1 << 17) /* EHCI clock enable */
42 #define USBCFG_OCE (1 << 16) /* OHCI clock enable */
[all …]
/linux/drivers/clk/pxa/
H A Dclk-pxa3xx.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Heavily inspired from former arch/arm/mach-pxa/pxa3xx.c
9 * For non-devicetree platforms. Once pxa is fully converted to devicetree, this
14 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/pxa-clock.h>
22 #include "clk-pxa.h"
30 #define CKENA (0x000C) /* A Clock Enable Register */
31 #define CKENB (0x0010) /* B Clock Enable Register */
32 #define CKENC (0x0024) /* C Clock Enable Register */
38 #define ACCR_PCCE (1 << 11) /* Power Mode Change Clock Enable */
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
H A Ddcn35_dccg.c1 /* SPDX-License-Identifier: MIT */
34 (dccg_dcn->regs->reg)
38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
41 dccg_dcn->base.ctx
44 dccg->ctx->logger
137 static void dccg35_set_dsc_clk_rcg(struct dccg *dccg, int inst, bool allow_rcg) in dccg35_set_dsc_clk_rcg()
141 if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dsc && allow_rcg) in dccg35_set_dsc_clk_rcg()
167 static void dccg35_set_symclk32_se_rcg( in dccg35_set_symclk32_se_rcg()
170 bool enable) in dccg35_set_symclk32_se_rcg() argument
174 if (!dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se && enable) in dccg35_set_symclk32_se_rcg()
[all …]
/linux/drivers/clk/bcm/
H A Dclk-sr.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-sr.h>
12 #include "clk-iproc.h"
34 static const struct iproc_pll_ctrl sr_genpll0 = {
47 static const struct iproc_clk_ctrl sr_genpll0_clk[] = {
51 .enable = ENABLE_VAL(0x4, 6, 0, 12),
57 .enable = ENABLE_VAL(0x4, 7, 1, 13),
63 .enable = ENABLE_VAL(0x4, 8, 2, 14),
69 .enable = ENABLE_VAL(0x4, 9, 3, 15),
[all …]
H A Dclk-ns2.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-ns2.h>
12 #include "clk-iproc.h"
31 static const struct iproc_pll_ctrl genpll_scr = {
43 static const struct iproc_clk_ctrl genpll_scr_clk[] = {
51 .enable = ENABLE_VAL(0x0, 18, 12, 0),
57 .enable = ENABLE_VAL(0x0, 19, 13, 0),
63 .enable = ENABLE_VAL(0x0, 20, 14, 0),
69 .enable = ENABLE_VAL(0x0, 21, 15, 0),
[all …]
H A Dclk-cygnus.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/bcm-cygnus.h>
14 #include "clk-iproc.h"
41 static void __init cygnus_armpll_init(struct device_node *node) in cygnus_armpll_init()
45 CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
47 static const struct iproc_pll_ctrl genpll = {
61 static const struct iproc_clk_ctrl genpll_clk[] = {
65 .enable = ENABLE_VAL(0x4, 6, 0, 12),
71 .enable = ENABLE_VAL(0x4, 7, 1, 13),
[all …]
/linux/drivers/media/platform/ti/davinci/
H A Dvpif.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
129 static inline void vpif_set_bit(u32 reg, u32 bit) in vpif_set_bit()
134 static inline void vpif_clr_bit(u32 reg, u32 bit) in vpif_clr_bit()
145 ((((0xFFFFFFFF) << (32 - bits)) >> (32 - bits)) << pos)
183 /* bit position of clock and channel enable in vpif_chn_ctrl register */
262 /* inline function to enable/disable channel0 */
263 static inline void enable_channel0(int enable) in enable_channel0() argument
265 if (enable) in enable_channel0()
271 /* inline function to enable/disable channel1 */
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/linux/sound/soc/codecs/
H A Dab8500-codec.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2012
8 * for ST-Ericsson.
14 * for ST-Ericsson.
29 #include <linux/mfd/abx500/ab8500-sysctrl.h>
30 #include <linux/mfd/abx500/ab8500-codec.h>
39 #include <sound/soc-dapm.h>
42 #include "ab8500-codec.h"
56 /* Nr of FIR/IIR-coeff banks in ANC-block */
77 static const char * const enum_sid_state[] = {
[all …]
H A Dmt6357.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
17 static void set_playback_gpio(struct mt6357_priv *priv, bool enable) in set_playback_gpio() argument
19 regmap_write(priv->regmap, MT6357_GPIO_MODE2_CLR, MT6357_GPIO_MODE2_CLEAR_ALL); in set_playback_gpio()
20 if (enable) { in set_playback_gpio()
22 regmap_write(priv->regmap, MT6357_GPIO_MODE2_SET, in set_playback_gpio()
32 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0, in set_playback_gpio()
44 static void set_capture_gpio(struct mt6357_priv *priv, bool enable) in set_capture_gpio() argument
46 regmap_write(priv->regmap, MT6357_GPIO_MODE3_CLR, MT6357_GPIO_MODE3_CLEAR_ALL); in set_capture_gpio()
47 if (enable) { in set_capture_gpio()
[all …]
H A Dcs530x.c1 // SPDX-License-Identifier: GPL-2.0
27 static const char *cs530x_supply_names[CS530X_NUM_SUPPLIES] = {
28 "vdd-a",
29 "vdd-io",
32 static const struct reg_default cs530x_reg_defaults[] = {
55 static bool cs530x_read_and_write_regs(unsigned int reg) in cs530x_read_and_write_regs()
84 static bool cs530x_readable_register(struct device *dev, unsigned int reg) in cs530x_readable_register()
95 static bool cs530x_writeable_register(struct device *dev, unsigned int reg) in cs530x_writeable_register()
106 static int cs530x_put_volsw_vu(struct snd_kcontrol *kcontrol, in cs530x_put_volsw_vu()
112 struct regmap *regmap = cs530x->regmap; in cs530x_put_volsw_vu()
[all …]
H A Drt9123p.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt9123p.c -- RT9123 (HW Mode) ALSA SoC Codec driver
19 #include <sound/soc-dai.h>
20 #include <sound/soc-dapm.h>
23 struct gpio_desc *enable; member
28 static int rt9123p_daiops_trigger(struct snd_pcm_substream *substream, int cmd, in rt9123p_daiops_trigger()
31 struct snd_soc_component *comp = dai->component; in rt9123p_daiops_trigger()
34 if (!rt9123p->enable) in rt9123p_daiops_trigger()
41 mdelay(rt9123p->enable_delay); in rt9123p_daiops_trigger()
42 if (rt9123p->enable_switch) { in rt9123p_daiops_trigger()
[all …]
H A Dnau8315.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // nau8315.c -- NAU8315 ALSA SoC Audio Amplifier Driver
22 #include <sound/soc-dai.h>
23 #include <sound/soc-dapm.h>
26 struct gpio_desc *enable; member
30 static int nau8315_daiops_trigger(struct snd_pcm_substream *substream, in nau8315_daiops_trigger()
33 struct snd_soc_component *component = dai->component; in nau8315_daiops_trigger()
37 if (!nau8315->enable) in nau8315_daiops_trigger()
44 if (nau8315->enpin_switch) { in nau8315_daiops_trigger()
45 gpiod_set_value(nau8315->enable, 1); in nau8315_daiops_trigger()
[all …]
H A Dak4535.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ak4535.c -- AK4535 ALSA Soc Audio driver
37 static const struct reg_default ak4535_reg_defaults[] = {
55 static bool ak4535_volatile(struct device *dev, unsigned int reg) in ak4535_volatile()
65 static const char *ak4535_mono_gain[] = {"+6dB", "-17dB"};
66 static const char *ak4535_mono_out[] = {"(L + R)/2", "Hi-Z"};
67 static const char *ak4535_hp_out[] = {"Stereo", "Mono"};
68 static const char *ak4535_deemp[] = {"44.1kHz", "Off", "48kHz", "32kHz"};
69 static const char *ak4535_mic_select[] = {"Internal", "External"};
71 static const struct soc_enum ak4535_enum[] = {
[all …]
H A Dwcd-clsh-v2.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
3 // Copyright (c) 2017-2018, Linaro Limited
10 #include "wcd-clsh-v2.h"
22 /* Class-H registers for codecs from and above WCD9335 */
119 static inline void wcd_enable_clsh_block(struct wcd_clsh_ctrl *ctrl, in wcd_enable_clsh_block()
120 bool enable) in wcd_enable_clsh_block() argument
122 struct snd_soc_component *comp = ctrl->comp; in wcd_enable_clsh_block()
124 if ((enable && ++ctrl->clsh_users == 1) || in wcd_enable_clsh_block()
125 (!enable && --ctrl->clsh_users == 0)) in wcd_enable_clsh_block()
[all …]
H A Drt9123.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt9123.c -- RT9123 (SW I2C Mode) ALSA SoC Codec driver
25 #include <sound/soc-dai.h>
26 #include <sound/soc-dapm.h>
48 struct gpio_desc *enable; member
54 static int rt9123_enable_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, in rt9123_enable_event()
57 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); in rt9123_enable_event()
58 struct device *dev = comp->dev; in rt9123_enable_event()
59 unsigned int enable; in rt9123_enable_event() local
64 enable = 1; in rt9123_enable_event()
[all …]
/linux/drivers/power/sequencing/
H A Dpwrseq-qcom-wcn.c1 // SPDX-License-Identifier: GPL-2.0-only
40 static void pwrseq_qcom_wcn_ensure_gpio_delay(struct pwrseq_qcom_wcn_ctx *ctx) in pwrseq_qcom_wcn_ensure_gpio_delay()
45 if (!ctx->pdata->gpio_enable_delay_ms) in pwrseq_qcom_wcn_ensure_gpio_delay()
48 diff_jiffies = jiffies - ctx->last_gpio_enable_jf; in pwrseq_qcom_wcn_ensure_gpio_delay()
51 if (diff_msecs < ctx->pdata->gpio_enable_delay_ms) in pwrseq_qcom_wcn_ensure_gpio_delay()
52 msleep(ctx->pdata->gpio_enable_delay_ms - diff_msecs); in pwrseq_qcom_wcn_ensure_gpio_delay()
55 static int pwrseq_qcom_wcn_vregs_enable(struct pwrseq_device *pwrseq) in pwrseq_qcom_wcn_vregs_enable()
59 return regulator_bulk_enable(ctx->pdata->num_vregs, ctx->regs); in pwrseq_qcom_wcn_vregs_enable()
62 static int pwrseq_qcom_wcn_vregs_disable(struct pwrseq_device *pwrseq) in pwrseq_qcom_wcn_vregs_disable()
66 return regulator_bulk_disable(ctx->pdata->num_vregs, ctx->regs); in pwrseq_qcom_wcn_vregs_disable()
[all …]
/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-gpio.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt8192-afe-gpio.c -- Mediatek 8192 afe gpio ctrl
11 #include "mt8192-afe-common.h"
12 #include "mt8192-afe-gpio.h"
14 static struct pinctrl *aud_pinctrl;
60 static struct audio_gpio_attr aud_gpios[MT8192_AFE_GPIO_GPIO_NUM] = {
101 static DEFINE_MUTEX(gpio_request_mutex);
103 static int mt8192_afe_gpio_select(struct device *dev, in mt8192_afe_gpio_select()
111 return -EINVAL; in mt8192_afe_gpio_select()
117 return -EIO; in mt8192_afe_gpio_select()
[all …]
/linux/drivers/acpi/
H A Dosi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * osi.c - _OSI implementation
27 bool enable; member
30 static struct acpi_osi_config {
40 static struct acpi_osi_config osi_config;
41 static struct acpi_osi_entry
48 static u32 acpi_osi_handler(acpi_string interface, u32 supported) in acpi_osi_handler()
71 bool enable = true; in acpi_osi_setup() local
95 osi->enable = false; in acpi_osi_setup()
102 enable = false; in acpi_osi_setup()
[all …]
/linux/drivers/fpga/tests/
H A Dfpga-bridge-test.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/fpga/fpga-bridge.h>
17 bool enable; member
33 static int op_enable_set(struct fpga_bridge *bridge, bool enable) in op_enable_set() argument
35 struct bridge_stats *stats = bridge->priv; in op_enable_set()
37 stats->enable = enable; in op_enable_set()
46 static const struct fpga_bridge_ops fake_bridge_ops = {
51 * register_test_bridge() - Register a fake FPGA bridge for testing.
57 static struct bridge_ctx *register_test_bridge(struct kunit *test, const char *dev_name) in register_test_bridge()
65 ctx->dev = kunit_device_register(test, dev_name); in register_test_bridge()
[all …]
/linux/drivers/gpu/drm/i915/
H A Di915_mitigations.c1 // SPDX-License-Identifier: MIT
15 static unsigned long mitigations __read_mostly = ~0UL;
21 static const char * const names[] = {
30 static int mitigations_set(const char *val, const struct kernel_param *kp) in mitigations_set()
41 return -ENOMEM; in mitigations_set()
44 bool enable = true; in mitigations_set() local
62 enable = !enable; in mitigations_set()
67 enable = !enable; in mitigations_set()
76 if (enable) in mitigations_set()
86 err = -EINVAL; in mitigations_set()
[all …]
/linux/include/acpi/
H A Dcppc_acpi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
37 #define CPPC_AUTO_ACT_WINDOW_MAX_SIG ((1 << CPPC_AUTO_ACT_WINDOW_SIG_BIT_SIZE) - 1)
38 #define CPPC_AUTO_ACT_WINDOW_MAX_EXP ((1 << CPPC_AUTO_ACT_WINDOW_EXP_BIT_SIZE) - 1)
83 /* These are indexes into the per-cpu cpc_regs[]. Order is important. */
99 ENABLE, enumerator
155 extern int cppc_set_enable(int cpu, bool enable);
169 extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable);
173 extern int cppc_get_auto_sel(int cpu, bool *enable);
174 extern int cppc_set_auto_sel(int cpu, bool enable);
179 static inline int cppc_get_desired_perf(int cpunum, u64 *desired_perf) in cppc_get_desired_perf()
[all …]
/linux/drivers/media/rc/
H A Drc-loopback.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loopback driver for rc-core,
8 * which is useful for (scripted) debugging of rc-core without
16 #include <media/rc-core.h>
18 #define DRIVER_NAME "rc-loopback"
34 static struct loopback_dev loopdev;
36 static int loop_set_tx_mask(struct rc_dev *dev, u32 mask) in loop_set_tx_mask()
38 struct loopback_dev *lodev = dev->priv; in loop_set_tx_mask()
41 dev_dbg(&dev->dev, "invalid tx mask: %u\n", mask); in loop_set_tx_mask()
45 dev_dbg(&dev->dev, "setting tx mask: %u\n", mask); in loop_set_tx_mask()
[all …]
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_crtc.c1 // SPDX-License-Identifier: MIT
43 struct drm_crtc *crtc = &acrtc->base; in amdgpu_dm_crtc_handle_vblank()
44 struct drm_device *dev = crtc->dev; in amdgpu_dm_crtc_handle_vblank()
49 spin_lock_irqsave(&dev->event_lock, flags); in amdgpu_dm_crtc_handle_vblank()
51 /* Send completion event for cursor-only commits */ in amdgpu_dm_crtc_handle_vblank()
52 if (acrtc->event && acrtc->pflip_status != AMDGPU_FLIP_SUBMITTED) { in amdgpu_dm_crtc_handle_vblank()
53 drm_crtc_send_vblank_event(crtc, acrtc->event); in amdgpu_dm_crtc_handle_vblank()
55 acrtc->event = NULL; in amdgpu_dm_crtc_handle_vblank()
58 spin_unlock_irqrestore(&dev->event_lock, flags); in amdgpu_dm_crtc_handle_vblank()
65 return crtc_state->active && drm_atomic_crtc_needs_modeset(crtc_state); in amdgpu_dm_crtc_modeset_required()
[all …]
/linux/drivers/mmc/host/
H A Dsdhci-pci-gli.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Version: v0.9.0 (2019-08-08)
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pci.h"
21 #include "sdhci-uhs2.h"
292 static void sdhci_gli_mask_replay_timer_timeout(struct pci_dev *pdev) in sdhci_gli_mask_replay_timer_timeout()
306 static inline void gl9750_wt_on(struct sdhci_host *host) in gl9750_wt_on()
323 static inline void gl9750_wt_off(struct sdhci_host *host) in gl9750_wt_off()
340 static void gli_set_9750(struct sdhci_host *host) in gli_set_9750()
411 /* enable tuning parameters control */ in gli_set_9750()
[all …]

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