| /linux/Documentation/admin-guide/pm/ |
| H A D | intel_idle.rst | 28 processor's functional blocks into low-power states. That instruction takes two
63 .. _intel-idle-enumeration-of-states:
65 Enumeration of Idle States
71 as C-states (in the ACPI terminology) or idle states. The list of meaningful
72 ``MWAIT`` hint values and idle states (i.e. low-power configurations of the
76 In order to create a list of available idle states required by the ``CPUIdle``
77 subsystem (see :ref:`idle-states-representation` in
79 ``intel_idle`` can use two sources of information: static tables of idle states
90 states, ``intel_idle`` first looks for a ``_CST`` object under one of the ACPI
93 ``CPUIdle`` subsystem expects that the list of idle states supplied by the
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| H A D | strategies.rst | 15 One of them is based on using global low-power states of the whole system in
17 significantly reduced, referred to as :doc:`sleep states <sleep-states>`. The
18 kernel puts the system into one of these states when requested by user space
21 user space code can run. Because sleep states are global and the whole system
26 <working-state>`, is based on adjusting the power states of individual hardware
30 a metastate covering a range of different power states of the system in which
32 ``inactive`` (idle). If they are active, they have to be in power states
34 are inactive, ideally, they should be in low-power states in which they may not
43 for the same system in a sleep state. However, transitions from sleep states
47 sleep states than when they are runtime idle most of the time.
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| /linux/drivers/cpuidle/ |
| H A D | dt_idle_genpd.c | 26 struct genpd_power_state *states, int state_count) in pd_parse_state_nodes() argument
32 ret = parse_state(to_of_node(states[i].fwnode), &state); in pd_parse_state_nodes()
42 states[i].data = state_buf; in pd_parse_state_nodes()
50 kfree(states[i].data); in pd_parse_state_nodes()
56 struct genpd_power_state **states, in pd_parse_states() argument
61 /* Parse the domain idle states. */ in pd_parse_states()
62 ret = of_genpd_parse_idle_states(np, states, state_count); in pd_parse_states()
67 ret = pd_parse_state_nodes(parse_state, *states, *state_count); in pd_parse_states()
69 kfree(*states); in pd_parse_states()
74 static void pd_free_states(struct genpd_power_state *states, in pd_free_states() argument
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| H A D | cpuidle-riscv-sbi.c | 35 u32 *states; member
81 u32 *states = __this_cpu_read(sbi_cpuidle_data.states); in sbi_cpuidle_enter_state() local
82 u32 state = states[idx]; in sbi_cpuidle_enter_state()
96 u32 *states = data->states; in __sbi_enter_domain_idle_state() local
116 state = states[idx]; in __sbi_enter_domain_idle_state()
222 * of a shared state for the domain, assumes the domain states are all in sbi_dt_cpu_init_topology()
223 * deeper states. in sbi_dt_cpu_init_topology()
225 drv->states[state_count - 1].flags |= CPUIDLE_FLAG_RCU_IDLE; in sbi_dt_cpu_init_topology()
226 drv->states[state_count - 1].enter = sbi_enter_domain_idle_state; in sbi_dt_cpu_init_topology()
227 drv->states[state_count - 1].enter_s2idle = in sbi_dt_cpu_init_topology()
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| H A D | dt_idle_states.c | 3 * DT idle states parsing code.
9 #define pr_fmt(fmt) "DT idle-states: " fmt
62 * latencies as defined in idle states bindings in init_state_node()
123 * dt_init_idle_driver() - Parse the DT idle states and initialize the
124 * idle driver states array
138 * If DT idle states are detected and are valid the state count and states
142 * Return: number of valid DT idle states parsed, <0 on failure
158 * We get the idle states for the first logical cpu in the in dt_init_idle_driver()
190 pr_warn("State index reached static CPU idle driver states array size\n"); in dt_init_idle_driver()
194 idle_state = &drv->states[state_idx++]; in dt_init_idle_driver()
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| H A D | Kconfig.arm | 12 It provides a generic idle driver whose idle states are configured
25 managing idle states through the PSCI firmware interface.
28 - If the idle states are described with the non-hierarchical layout,
29 all idle states are still available.
31 - If the idle states are described with the hierarchical layout,
32 only the idle states defined per CPU are available, but not the ones
33 being shared among a group of CPUs (aka cluster idle states).
44 idle states.
56 define different C-states for little and big cores through the
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| H A D | cpuidle-psci.c | 69 u32 *states = data->psci_states; in __psci_enter_domain_idle_state() local
72 u32 state = states[idx]; in __psci_enter_domain_idle_state()
265 * of a shared state for the domain, assumes the domain states are all in psci_dt_cpu_init_topology()
266 * deeper states. On PREEMPT_RT the hierarchical topology is limited to in psci_dt_cpu_init_topology()
269 drv->states[state_count - 1].enter_s2idle = psci_enter_s2idle_domain_idle_state; in psci_dt_cpu_init_topology()
271 drv->states[state_count - 1].enter = psci_enter_domain_idle_state; in psci_dt_cpu_init_topology()
313 /* Idle states parsed correctly, store them in the per-cpu struct. */ in psci_dt_cpu_init_idle()
326 * idle states must not be enabled, so bail out in psci_cpu_init_idle()
382 * PSCI idle states relies on architectural WFI to be represented as in psci_idle_init_cpu()
385 drv->states[0].enter = psci_enter_idle_state; in psci_idle_init_cpu()
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| H A D | cpuidle-mvebu-v7.c | 36 if (drv->states[index].flags & MVEBU_V7_FLAG_DEEP_IDLE) in mvebu_v7_enter_idle()
53 .states[0] = ARM_CPUIDLE_WFI_STATE,
54 .states[1] = {
63 .states[2] = {
77 .states[0] = ARM_CPUIDLE_WFI_STATE,
78 .states[1] = {
92 .states[0] = ARM_CPUIDLE_WFI_STATE,
93 .states[1] = {
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| /linux/Documentation/devicetree/bindings/cpu/ |
| H A D | idle-states.yaml | 4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
7 title: Idle states
19 dynamically, where cores can be put in different low-power states (ranging
20 from simple wfi to power gating) according to OS PM policies. The CPU states
21 representing the range of dynamic idle states that a processor can enter at
23 parameters required to enter/exit specific idle states on a given processor.
26 2 - ARM idle states
30 power states an ARM CPU can be put into are identified by the following list:
38 The power states described in the SBSA document define the basic CPU states on
40 PM implementation to put the processor in different idle states (which include
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| /linux/drivers/regulator/ |
| H A D | gpio-regulator.c | 39 struct gpio_regulator_state *states; member
51 if (data->states[ptr].gpios == data->state) in gpio_regulator_get_value()
52 return data->states[ptr].value; in gpio_regulator_get_value()
65 if (data->states[ptr].value < best_val && in gpio_regulator_set_voltage()
66 data->states[ptr].value >= min_uV && in gpio_regulator_set_voltage()
67 data->states[ptr].value <= max_uV) { in gpio_regulator_set_voltage()
68 target = data->states[ptr].gpios; in gpio_regulator_set_voltage()
69 best_val = data->states[ptr].value; in gpio_regulator_set_voltage()
94 return data->states[selector].value; in gpio_regulator_list_voltage()
104 if (data->states[ptr].value > best_val && in gpio_regulator_set_current_limit()
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| /linux/tools/power/cpupower/man/ |
| H A D | cpupower-idle-set.1 | 12 sleep states. This can be handy for power vs performance tuning.
23 Disable all idle states with a equal or higher latency than <LATENCY>.
25 Enable all idle states with a latency lower than <LATENCY>.
28 Enable all idle states if not enabled already.
32 Cpuidle Governors Policy on Disabling Sleep States
36 how to choose sleep states, subsequent sleep states on this core, might get
46 then all deeper states are disabled as well. Likewise, if one enables a
53 If criteria are not met to enter deeper sleep states and the lightest sleep
63 By default processor sleep states of all CPU cores are set. Please refer
65 C-states of specific cores.
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| /linux/Documentation/devicetree/bindings/powerpc/opal/ |
| H A D | power-mgt.txt | 5 idle states. The description of these idle states is exposed via the
14 - flags: indicating some aspects of this idle states such as the
16 idle states and so on. The flag bits are as follows:
27 The following properties provide details about the idle states. These
32 If idle-states are defined, then the properties
38 Array of strings containing the names of the idle states.
42 flags associated with the aforementioned idle-states. The
62 exit-latencies (in ns) for the idle states in
67 target-residency (in ns) for the idle states in
75 PSSCR for each of the idle states in ibm,cpu-idle-state-names.
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| /linux/tools/verification/rvgen/rvgen/ |
| H A D | automata.py | 26 self.states, self.initial_state, self.final_states = self.__get_state_variables()
81 states = []
97 states.append(state)
108 states = sorted(set(states))
109 states.remove(initial_state)
111 # Insert the initial state at the bein og the states
112 states.insert(0, initial_state)
117 return states, initial_state, final_states
146 states = self.states
155 for state in states:
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| H A D | dot2c.py | 20 enum_states_def = "states"
41 for state in self.states:
89 if self.states.__len__() > 255:
92 if self.states.__len__() > 65535:
95 if self.states.__len__() > 1000000:
96 raise Exception("Too many states: %d" % self.states.__len__())
134 return self.__get_string_vector_per_line_content(self.states)
152 max_state_name = max(self.states, key = len).__len__()
156 nr_states = self.states.__len__()
204 for state in self.states:
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| /linux/drivers/cpuidle/governors/ |
| H A D | ladder.c | 40 struct ladder_device_state states[CPUIDLE_STATE_MAX]; member
56 ldev->states[old_idx].stats.promotion_count = 0; in ladder_do_selection()
57 ldev->states[old_idx].stats.demotion_count = 0; in ladder_do_selection()
73 int first_idx = drv->states[0].flags & CPUIDLE_FLAG_POLLING ? 1 : 0; in ladder_select_state()
83 last_state = &ldev->states[last_idx]; in ladder_select_state()
85 last_residency = dev->last_residency_ns - drv->states[last_idx].exit_latency_ns; in ladder_select_state()
91 drv->states[last_idx + 1].exit_latency_ns <= latency_req) { in ladder_select_state()
103 drv->states[last_idx].exit_latency_ns > latency_req)) { in ladder_select_state()
107 if (drv->states[i].exit_latency_ns <= latency_req) in ladder_select_state()
137 int first_idx = drv->states[0].flags & CPUIDLE_FLAG_POLLING ? 1 : 0; in ladder_enable_device()
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-surface_aggregator-tabletsw | 8 Currently returned posture states are:
29 New states may be introduced with new hardware. Users therefore
30 must not rely on this list of states being exhaustive and
31 gracefully handle unknown states.
39 returned posture states are:
55 New states may be introduced with new hardware. Users therefore
56 must not rely on this list of states being exhaustive and
57 gracefully handle unknown states.
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| /linux/Documentation/devicetree/bindings/mux/ |
| H A D | mux-consumer.yaml | 29 be set to, the property "mux-states" must be used. An optional property
31 each of the multiplixer states listed in the "mux-states" property.
33 Properties "mux-controls" and "mux-states" can be used depending on how
35 needs to set multiple states in a mux controller, then property
37 controller to a given state then property "mux-states" can be used.
49 mux-states:
62 controller to an index into the list given by the "mux-states"
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| /linux/Documentation/driver-api/pm/ |
| H A D | cpuidle.rst | 25 However, there may be multiple different idle states that can be used in such a
35 units: *governors* responsible for selecting idle states to ask the processor
85 struct cpuidle_state objects representing idle states that the
117 The list of idle states to take into consideration is represented by the
118 :c:member:`states` array of struct cpuidle_state objects held by the
149 account when selecting idle states. In order to obtain the current effective
164 First of all, a ``CPUIdle`` driver has to populate the :c:member:`states` array
167 idle states that the processor hardware can be asked to enter shared by all of
170 The entries in the :c:member:`states` array are expected to be sorted by the
214 :c:member:`states` array representing the idle state to ask the processor to
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| /linux/Documentation/devicetree/bindings/power/ |
| H A D | power-domain.yaml | 31 domain-idle-states:
36 Phandles of idle states that defines the available states for the
40 Note that, the domain-idle-state property reflects the idle states of this
41 PM domain and not the idle states of the devices or sub-domains in the PM
42 domain. Devices and sub-domains have their own idle states independent of
43 the parent domain's idle states. In the absence of this property, the
110 domain-idle-states = <&DOMAIN_RET>, <&DOMAIN_PWR_DN>;
118 domain-idle-states = <&DOMAIN_PWR_DN>;
121 domain-idle-states {
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| /linux/Documentation/admin-guide/blockdev/drbd/ |
| H A D | figures.rst | 20 .. kernel-figure:: conn-states-8.dot
21 :alt: conn-states-8.dot
24 .. kernel-figure:: disk-states-8.dot
25 :alt: disk-states-8.dot
28 .. kernel-figure:: peer-states-8.dot
29 :alt: peer-states-8.dot
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| /linux/include/rv/ |
| H A D | ltl_monitor.h | 36 memset(&mon->states, 0, sizeof(mon->states)); in ltl_task_init()
111 char states[32], next[32]; in ltl_trace_event() local
117 snprintf(states, sizeof(states), "%*pbl", RV_MAX_BA_STATES, mon->states); in ltl_trace_event()
127 CONCATENATE(trace_event_, MONITOR_NAME)(task, states, atoms.buffer, next); in ltl_trace_event()
138 if (test_bit(i, mon->states)) in ltl_validate()
144 memcpy(mon->states, next_states, sizeof(next_states)); in ltl_validate()
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| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | rohm,bd71815-regulator.yaml | 56 PMIC "RUN" state voltage in uV when PMIC HW states are used. See
76 PMIC "SUSPEND" state voltage in uV when PMIC HW states are used. See
85 PMIC "LPSR" state voltage in uV when PMIC HW states are used. See
92 # Bucks 1 and 2 support giving separate voltages for operational states
93 # (RUN /CLEAN according to data-sheet) and non operational states
100 # Given RUN voltage is used at all states if regulator is enabled at
102 # Values given for other states are regarded as enable/disable at
106 # for each of the HW states (RUN/SNVS/SUSPEND/LPSR). HW defaults can
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| H A D | gpio-regulator.yaml | 35 voltage/current listed in "states".
39 gpios-states:
56 states:
59 no states in the "states" array, use a fixed regulator instead.
97 - states
114 states = <1800000 0x3>,
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| /linux/Documentation/arch/arm/ |
| H A D | cluster-pm-race-avoidance.rst | 86 Each CPU has one of these states assigned to it at any point in time.
87 The CPU states are described in the "CPU state" section, below.
91 to introduce additional states in order to avoid races between different
93 level states are described in the "Cluster state" section.
95 To help distinguish the CPU states from cluster states in this
96 discussion, the state names are given a `CPU_` prefix for the CPU states,
97 and a `CLUSTER_` or `INBOUND_` prefix for the cluster states.
109 The algorithm defines the following states for each CPU in the system:
131 The definitions of the four states correspond closely to the states of
134 Transitions between states occur as follows.
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| /linux/drivers/md/dm-vdo/ |
| H A D | encodings.c | 1294 * @states: The component states to destroy.
1296 void vdo_destroy_component_states(struct vdo_component_states *states) in vdo_destroy_component_states() argument
1298 if (states == NULL) in vdo_destroy_component_states()
1301 vdo_uninitialize_layout(&states->layout); in vdo_destroy_component_states()
1310 * @states: An object to hold the successfully decoded state.
1316 struct vdo_component_states *states) in decode_components() argument
1320 decode_vdo_component(buffer, offset, &states->vdo); in decode_components()
1323 states->vdo.config.physical_blocks, &states->layout); in decode_components()
1328 &states->recovery_journal); in decode_components()
1332 result = decode_slab_depot_state_2_0(buffer, offset, &states->slab_depot); in decode_components()
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