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Searched full:stall (Results 1 – 25 of 390) sorted by relevance

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/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen3/
H A D	other.json	22 …oken Stall. Also counts cycles when the thread is not selected to dispatch but would have been sta… 28 …en Stall. Also counts cycles when the thread is not selected to dispatch but would have been stall… 34 …Stall. Also counts cycles when the thread is not selected to dispatch but would have been stalled … 40 …Stall. Also counts cycles when the thread is not selected to dispatch but would have been stalled … 46 … valid but does not get dispatched due to a token stall. Integer Scheduler miscellaneous resource … 52 …en Stall. Also counts cycles when the thread is not selected to dispatch but would have been stall… 58 …ken Stall. Also counts cycles when the thread is not selected to dispatch but would have been stal… 64 …Stall. Also counts cycles when the thread is not selected to dispatch but would have been stalled … 70 …here a dispatch group is valid but does not get dispatched due to a token stall. Insufficient Reti… 76 …here a dispatch group is valid but does not get dispatched due to a token stall. AGSQ Tokens unava… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen2/
H A D	other.json	28 …here a dispatch group is valid but does not get dispatched due to a token stall. FP Miscellaneous … 34 … group is valid but does not get dispatched due to a token stall. FP scheduler resource stall. App… 40 …s valid but does not get dispatched due to a token stall. Floating point register file resource st… 46 …oup is valid but does not get dispatched due to a token stall. Taken branch buffer resource stall.… 52 … valid but does not get dispatched due to a token stall. Integer Scheduler miscellaneous resource … 58 …h group is valid but does not get dispatched due to a token stall. Store queue resource stall. App… 64 …h group is valid but does not get dispatched due to a token stall. Load queue resource stall. Appl… 70 … valid but does not get dispatched due to a token stall. Integer Physical Register File resource s… 76 … dispatch group is valid but does not get dispatched due to a token stall. SC AGU dispatch stall.", 82 …here a dispatch group is valid but does not get dispatched due to a token stall. RETIRE Tokens una… [all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a510/
H A D	pipeline.json	9 "ArchStdEvent": "STALL" 39 …he issue of an operation is stalled and there is an interlock. Stall cycles due to a stall in the … 42 …he issue of an operation is stalled and there is an interlock. Stall cycles due to a stall in the … 45 …d/store instruction waiting for data to calculate the address. Stall cycles due to a stall in the … 48 …d/store instruction waiting for data to calculate the address. Stall cycles due to a stall in the … 51 …nts every cycle where there is a stall or an interlock that is caused by a VPU instruction. Stall … 54 …nts every cycle where there is a stall or an interlock that is caused by a VPU instruction. Stall … 57 … due to the backend, load. This event counts every cycle where there is a stall in the Wr stage du… 60 … due to the backend, load. This event counts every cycle where there is a stall in the Wr stage du… 63 …due to the backend, store. This event counts every cycle where there is a stall in the Wr stage du… [all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a55/
H A D	pipeline.json	27 …s every cycle that issue is stalled and there is an interlock. Stall cycles due to a stall in Wr (… 30 …s every cycle that issue is stalled and there is an interlock. Stall cycles due to a stall in Wr (… 33 …truction waiting for data to calculate the address in the AGU. Stall cycles due to a stall in Wr (… 36 …truction waiting for data to calculate the address in the AGU. Stall cycles due to a stall in Wr (… 39 … there is an interlock that is due to an FPU/NEON instruction. Stall cycles due to a stall in the … 42 … there is an interlock that is due to an FPU/NEON instruction. Stall cycles due to a stall in the … 45 … issued due to the backend, load.This event counts every cycle there is a stall in the Wr stage du… 48 … issued due to the backend, load.This event counts every cycle there is a stall in the Wr stage du… 51 …issued due to the backend, store.This event counts every cycle there is a stall in the Wr stage du… 54 …issued due to the backend, store.This event counts every cycle there is a stall in the Wr stage du… [all …]
/freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/
H A D	pipeline.json	23 "BriefDescription": "Completion stall", 29 "BriefDescription": "Completion stall due to a Branch Unit", 35 "BriefDescription": "Completion stall by Dcache miss", 41 …"BriefDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L… 47 "BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3", 53 …"BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a confl… 54 …"PublicDescription": "Completion stall due to cache miss resolving in core's L2/L3 with a conflict" 59 "BriefDescription": "Completion stall due to cache miss resolving missed the L3", 65 "BriefDescription": "Completion stall due to cache miss that resolves in local memory", 66 "PublicDescription": "Completion stall due to cache miss resolving in core's Local Memory" [all …]
/freebsd/sys/contrib/device-tree/Bindings/misc/
H A D	qemu,vcpu-stall-detector.yaml	`4 $id: http://devicetree.org/schemas/misc/qemu,vcpu-stall-detector.yaml# 7 title: VCPU stall detector 10 This binding describes a CPU stall detector mechanism for virtual CPUs 19 - qemu,vcpu-stall-detector 27 The internal clock of the stall detector peripheral measure in Hz used 34 The stall detector expiration timeout measured in seconds. 47 compatible = "qemu,vcpu-stall-detector";`
/freebsd/lib/libpmc/pmu-events/arch/arm64/hisilicon/hip08/
H A D	metrics.json	151 "PublicDescription": "Sync stall L3 topdown metric", 152 "BriefDescription": "Sync stall L3 topdown metric", 158 "PublicDescription": "Rob stall L3 topdown metric", 159 "BriefDescription": "Rob stall L3 topdown metric", 165 "PublicDescription": "Ptag stall L3 topdown metric", 166 "BriefDescription": "Ptag stall L3 topdown metric", 172 "PublicDescription": "SaveOpQ stall L3 topdown metric", 173 "BriefDescription": "SaveOpQ stall L3 topdown metric", 179 "PublicDescription": "PC buffer stall L3 topdown metric", 180 "BriefDescription": "PC buffer stall L3 topdown metric", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/
H A D	other.json	17 …here a dispatch group is valid but does not get dispatched due to a token stall. RETIRE Tokens una… 23 …here a dispatch group is valid but does not get dispatched due to a token stall. AGSQ Tokens unava… 29 …here a dispatch group is valid but does not get dispatched due to a token stall. ALU tokens total … 35 …here a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 3_0 Tokens u… 41 …here a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 3 Tokens una… 47 …here a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 2 Tokens una… 53 …here a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 1 Tokens una…
/freebsd/lib/libpmc/pmu-events/arch/powerpc/power9/
H A D	cache.json	15 …"BriefDescription": "Completion stall due to a long latency scalar fixed point instruction (divisi… 20 …"BriefDescription": "Finish stall due to a scalar fixed point or CR instruction in the execution p… 30 "BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3" 35 …"BriefDescription": "Finish stall because the NTF instruction was a load that missed in the L1 and… 45 …"BriefDescription": "Finish stall because the NTF instruction was a load instruction with all its … 85 …"BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a confl… 90 …"BriefDescription": "Finish stall because the NTF instruction was a load that hit on an older stor… 105 … "BriefDescription": "Finish stall because the NTF instruction was a larx waiting to be satisfied"
H A D	frontend.json	25 …"BriefDescription": "Finish stall because the NTF instruction was a load or store that was held in… 70 …"BriefDescription": "Finish stall because the NTF instruction was a store waiting for a slot in th… 80 …"BriefDescription": "Completion stall of one cycle because the LSU requested to flush the next iop… 85 …"BriefDescription": "Finish stall because the NTF instruction was a stcx waiting for response from… 90 "BriefDescription": "Completion stall by LSU instruction" 100 …"BriefDescription": "Completion stall because the ISU is updating the register and notifying the E… 140 …"BriefDescription": "Finish stall because the NTF instruction was a mfspr instruction targeting an… 165 …"BriefDescription": "Finish stall because the NTF instruction was a store with all its dependencie… 205 …"BriefDescription": "Finish stall due to LRQ miscellaneous reasons, lost arbitration to LMQ slot, … 255 …"BriefDescription": "Finish stall because the NTF instruction was a tend instruction awaiting resp… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/nehalemex/
H A D	other.json	`48 "BriefDescription": "L1I instruction fetch stall cycles" 128 "BriefDescription": "All RAT stall cycles" 136 "BriefDescription": "Flag stall cycles" 144 "BriefDescription": "Partial register stall cycles" 160 "BriefDescription": "Scoreboard stall cycles" 168 "BriefDescription": "All Store buffer stall cycles" 176 "BriefDescription": "Segment rename stall cycles" 208 "BriefDescription": "Super Queue full stall cycles"`
/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A D	frontend.json	125 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 131 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 140 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 146 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 155 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 170 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 176 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 185 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 191 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 200 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/
H A D	frontend.json	109 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 115 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 124 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 130 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 139 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 154 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 160 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 169 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 175 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 184 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A D	frontend.json	125 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 131 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 140 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 146 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 155 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 170 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 176 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 185 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 191 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 200 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/
H A D	frontend.json	122 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 128 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 137 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 143 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 152 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 167 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 173 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 182 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 188 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 197 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", [all …]
/freebsd/contrib/ofed/libmlx5/
H A D	cq.c	793 int lock, enum polling_mode stall) 796 int lock, enum polling_mode stall) in _mlx5_end_poll() argument 805 if (stall) { in _mlx5_end_poll() 806 if (stall == POLLING_MODE_STALL_ADAPTIVE) { in _mlx5_end_poll() 829 int lock, enum polling_mode stall, int cqe_version) 832 int lock, enum polling_mode stall, int cqe_version) in mlx5_start_poll() argument 842 if (stall) { in mlx5_start_poll() 843 if (stall == POLLING_MODE_STALL_ADAPTIVE) { in mlx5_start_poll() 863 if (stall) { in mlx5_start_poll() 864 if (stall == POLLING_MODE_STALL_ADAPTIVE) { in mlx5_start_poll() [all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a73/
H A D	pipeline.json	`3 "PublicDescription": "A linefill caused an instruction side stall", 6 "BriefDescription": "A linefill caused an instruction side stall" 9 "PublicDescription": "A translation table walk caused an instruction side stall", 12 "BriefDescription": "A translation table walk caused an instruction side stall"`
/freebsd/lib/libpmc/pmu-events/arch/x86/nehalemep/
H A D	pipeline.json	324 "BriefDescription": "Any Instruction Length Decoder stall cycles", 332 "BriefDescription": "Instruction Queue full stall cycles", 340 "BriefDescription": "Length Change Prefix stall cycles", 348 "BriefDescription": "Stall cycles due to BPU MRU bypass", 356 "BriefDescription": "Regen stall cycles", 504 "BriefDescription": "All RAT stall cycles", 512 "BriefDescription": "Flag stall cycles", 520 "BriefDescription": "Partial register stall cycles", 536 "BriefDescription": "Scoreboard stall cycles", 544 "BriefDescription": "Resource related stall cycles", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/
H A D	frontend.json	109 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 115 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 128 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 136 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 142 …ont-end delivered no uops for a period of 2 cycles which was not interrupted by a back-end stall.", 155 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 168 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 176 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", 182 …d at least 2 bubble-slots for a period of 2 cycles which was not interrupted by a back-end stall.", 195 …d at least 3 bubble-slots for a period of 2 cycles which was not interrupted by a back-end stall.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A D	frontend.json	109 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 115 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 128 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 136 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 142 …ont-end delivered no uops for a period of 2 cycles which was not interrupted by a back-end stall.", 155 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 168 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 176 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", 182 …d at least 2 bubble-slots for a period of 2 cycles which was not interrupted by a back-end stall.", 195 …d at least 3 bubble-slots for a period of 2 cycles which was not interrupted by a back-end stall.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A D	frontend.json	109 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 115 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 128 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 136 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 142 …ont-end delivered no uops for a period of 2 cycles which was not interrupted by a back-end stall.", 155 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 168 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 176 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", 182 …d at least 2 bubble-slots for a period of 2 cycles which was not interrupted by a back-end stall.", 195 …d at least 3 bubble-slots for a period of 2 cycles which was not interrupted by a back-end stall.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/westmereep-dp/
H A D	pipeline.json	342 "BriefDescription": "Any Instruction Length Decoder stall cycles", 350 "BriefDescription": "Instruction Queue full stall cycles", 358 "BriefDescription": "Length Change Prefix stall cycles", 366 "BriefDescription": "Stall cycles due to BPU MRU bypass", 374 "BriefDescription": "Regen stall cycles", 522 "BriefDescription": "All RAT stall cycles", 530 "BriefDescription": "Flag stall cycles", 538 "BriefDescription": "Partial register stall cycles", 554 "BriefDescription": "Scoreboard stall cycles", 562 "BriefDescription": "Resource related stall cycles", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/westmereep-sp/
H A D	pipeline.json	342 "BriefDescription": "Any Instruction Length Decoder stall cycles", 350 "BriefDescription": "Instruction Queue full stall cycles", 358 "BriefDescription": "Length Change Prefix stall cycles", 366 "BriefDescription": "Stall cycles due to BPU MRU bypass", 374 "BriefDescription": "Regen stall cycles", 522 "BriefDescription": "All RAT stall cycles", 530 "BriefDescription": "Flag stall cycles", 538 "BriefDescription": "Partial register stall cycles", 554 "BriefDescription": "Scoreboard stall cycles", 562 "BriefDescription": "Resource related stall cycles", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/westmereex/
H A D	pipeline.json	342 "BriefDescription": "Any Instruction Length Decoder stall cycles", 350 "BriefDescription": "Instruction Queue full stall cycles", 358 "BriefDescription": "Length Change Prefix stall cycles", 366 "BriefDescription": "Stall cycles due to BPU MRU bypass", 374 "BriefDescription": "Regen stall cycles", 522 "BriefDescription": "All RAT stall cycles", 530 "BriefDescription": "Flag stall cycles", 538 "BriefDescription": "Partial register stall cycles", 554 "BriefDescription": "Scoreboard stall cycles", 562 "BriefDescription": "Resource related stall cycles", [all …]
/freebsd/sys/contrib/device-tree/Bindings/gpu/
H A D	nvidia,gk20a.txt	`17 - stall 50 interrupt-names = "stall", "nonstall"; 68 interrupt-names = "stall", "nonstall"; 86 interrupt-names = "stall", "nonstall"; 104 interrupt-names = "stall", "nonstall";`

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