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/linux/sound/soc/fsl/
H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
11 // The i.MX SSI core has some nasty limitations in AC97 mode. While most
13 // one FIFO which combines all valid receive slots. We cannot even select
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
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H A Dfsl_utils.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
18 * fsl_asoc_get_dma_channel - determine the dma channel for a SSI node
20 * @ssi_np: pointer to the SSI device tree node
26 * This function determines the dma and channel id for given SSI node. It
42 return -EINVAL; in fsl_asoc_get_dma_channel()
44 if (!of_device_is_compatible(dma_channel_np, "fsl,ssi in fsl_asoc_get_dma_channel()
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H A Dfsl_dma.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
16 #include <linux/dma-mapping.h>
72 /** fsl_dma_private: p-substream DMA data
74 * Each substream has a 1-to-1 association with a DMA channel.
76 * The link[] array is first because it needs to be aligned on a 32-byte
120 * Since each link descriptor has a 32-bit byte count field, we set
121 * period_bytes_max to the largest 32-bit number. We also have no maximum
125 * limitation in the SSI driver requires the sample rates for playback and
137 .period_bytes_max = (u32) -1,
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/linux/drivers/hsi/controllers/
H A Domap_ssi_port.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* OMAP SSI port driver.
4 * Copyright (C) 2010 Nokia Corporation. All rights reserved.
12 #include <linux/dma-mapping.h>
36 return gpiod_get_value(omap_port->wake_gpio); in ssi_wakein()
44 debugfs_remove_recursive(omap_port->dir); in ssi_debug_remove_port()
49 struct hsi_port *port = m->private; in ssi_port_regs_show()
51 struct hsi_controller *ssi = to_hsi_controller(port->device.parent); in ssi_port_regs_show() local
52 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); in ssi_port_regs_show()
53 void __iomem *base = omap_ssi->sys; in ssi_port_regs_show()
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H A Domap_ssi_core.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* OMAP SSI driver.
4 * Copyright (C) 2010 Nokia Corporation. All rights reserved.
17 #include <linux/dma-mapping.h>
42 struct hsi_controller *ssi = m->private; in ssi_regs_show() local
43 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); in ssi_regs_show()
44 void __iomem *sys = omap_ssi->sys; in ssi_regs_show()
46 pm_runtime_get_sync(ssi->device.parent); in ssi_regs_show()
50 pm_runtime_put(ssi->device.parent); in ssi_regs_show()
57 struct hsi_controller *ssi = m->private; in ssi_gdd_regs_show() local
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H A Domap_ssi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* OMAP SSI internal interface.
4 * Copyright (C) 2010 Nokia Corporation. All rights reserved.
23 #define SSI_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1)
28 * struct omap_ssm_ctx - OMAP synchronous serial module (TX/RX) context
50 * struct omap_ssi_port - OMAP SSI port data
53 * @sst_dma: SSI transmitter physical base address
54 * @ssr_dma: SSI receiver physical base address
55 * @sst_base: SSI transmitter base address
56 * @ssr_base: SSI receiver base address
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H A Domap_ssi_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Hardware definitions for SSI.
4 * Copyright (C) 2010 Nokia Corporation. All rights reserved.
13 * SSI SYS registers
48 * SSI SST registers
75 * SSI SSR registers
95 * SSI GDD registers
/linux/sound/soc/renesas/rcar/
H A Dssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SSIU/SSI support
13 * SSI interrupt status debug message when debugging
63 #define EN (1 << 0) /* SSI Module Enable */
79 #define SSI_NAME "ssi"
103 #define RSND_SSI_NO_BUSIF (1 << 1) /* SSI+DMA without BUSIF */
109 ((pos) = ((struct rsnd_ssi *)(priv)->ssi + i)); \
112 #define rsnd_ssi_get(priv, id) ((struct rsnd_ssi *)(priv->ssi) + id)
113 #define rsnd_ssi_nr(priv) ((priv)->ssi_nr)
115 #define rsnd_ssi_is_parent(ssi, io) ((ssi) == rsnd_io_to_mod_ssip(io)) argument
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H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SRU/SCU/SSIU/SSI support
12 * Renesas R-Car sound device structure
17 * - SRC : Sampling Rate Converter
18 * - CMD
19 * - CTU : Channel Count Conversion Unit
20 * - MIX : Mixer
21 * - DVC : Digital Volume and Mute Function
22 * - SSI : Serial Sound Interface
27 * - SRC : Sampling Rate Converter
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H A Dadg.c1 // SPDX-License-Identifier: GPL-2.0
3 // Helper routines for R-Car sound ADG.
6 #include <linux/clk-provider.h>
50 (i < adg->clkin_size) && \
51 ((pos) = adg->clkin[i]); \
55 (i < adg->clkout_size) && \
56 ((pos) = adg->clkout[i]); \
58 #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
85 for (i = 3; i >= 0; i--) { in rsnd_adg_calculate_brgx()
88 return (u32)((i << 8) | ((div / ratio) - 1)); in rsnd_adg_calculate_brgx()
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/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,ssi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
18 DMA controller to use, but the channels themselves are hard-wired. The
22 "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
23 "fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
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/linux/drivers/hsi/clients/
H A Dssi_protocol.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Implementation of the SSI McSAAB improved protocol.
7 * Copyright (C) 2010 Nokia Corporation. All rights reserved.
41 #define SSIP_MAX_CMDS 5 /* Number of pre-allocated commands buffers */
42 #define SSIP_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1)
45 * SSI protocol command definitions
101 * struct ssi_protocol - SSI protocol (McSAAB) data
111 * @keep_alive: Workaround for SSI HW bug
133 struct timer_list keep_alive; /* wake-up workaround */
146 /* List of ssi protocol instances */
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/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
11 status for all the 4 DMA channels
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
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/linux/arch/arm64/boot/dts/renesas/
H A Dr8a774c0.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a774c0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <0>;
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H A Dr8a77990.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
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H A Dr8a77961.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77961-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
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H A Dr8a774a1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774a1-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
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H A Dr8a774b1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774b1-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
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H A Dr8a77960.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7796-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
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H A Dr8a774e1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774e1-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
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H A Dr8a77965.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h>
19 #address-cells = <2>;
20 #size-cells = <2>;
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <0>;
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H A Dr8a77951.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H3 (R8A77951) SoC
8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7795-sysc.h>
19 #address-cells = <2>;
20 #size-cells = <2>;
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <0>;
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H A Dr8a77995.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
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/linux/drivers/spi/
H A Dspi-dw-mmio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Memory-mapped interface driver for DW SPI Core
24 #include "spi-dw.h"
57 * Elba SoC does not use ssi, pin override is used for cs 0,1 and
61 * bit: |---3-------2-------1-------0
79 struct dw_spi *dws = spi_controller_get_devdata(spi->controller); in dw_spi_mscc_set_cs()
81 struct dw_spi_mscc *dwsmscc = dwsmmio->priv; in dw_spi_mscc_set_cs()
90 writel(sw_mode, dwsmscc->spi_mst + MSCC_SPI_MST_SW_MODE); in dw_spi_mscc_set_cs()
102 dwsmscc = devm_kzalloc(&pdev->dev, sizeof(*dwsmscc), GFP_KERNEL); in dw_spi_mscc_init()
104 return -ENOMEM; in dw_spi_mscc_init()
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/linux/drivers/media/usb/gspca/
H A Dspca508.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2009 Jean-Francois Moine <http://moinejf.free.fr>
58 * Initialization data: this is the first set-up data written to the
66 {0x0000, 0x8110}, /* Disable all outputs */
67 /* READ {0x0000, 0x8114} -> 0000: 00 */
79 /* --------------------------------------- */
82 /* --------------------------------------- */
89 {0x00c0, 0x8804}, /* SSI slave addr */
90 {0x0008, 0x8802}, /* 375 Khz SSI clock */
91 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
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