Home
last modified time | relevance | path

Searched +full:ssi +full:- +full:2 (Results 1 – 25 of 166) sorted by relevance

1234567

/linux/sound/soc/fsl/
H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
11 // The i.MX SSI core has some nasty limitations in AC97 mode. While most
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
60 * FSLSSI_I2S_FORMATS: audio formats supported by the SSI
[all …]
H A Dfsl_ssi.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * fsl_ssi.h - ALSA SSI interface for the Freescale MPC8610 and i.MX SoC
7 * Copyright 2007-2008 Freescale Semiconductor, Inc.
13 /* -- SSI Register Map -- */
15 /* SSI Transmit Data Register 0 */
17 /* SSI Transmit Data Register 1 */
19 /* SSI Receive Data Register 0 */
21 /* SSI Receive Data Register 1 */
23 /* SSI Control Register */
25 /* SSI Interrupt Status Register */
[all …]
H A Dp1022_rdk.c1 // SPDX-License-Identifier: GPL-2.0
28 /* P1022-specific PMUXCR and DMUXCR bit definitions */
38 #define CCSR_GUTS_DMUXCR_SSI 2 /* DMA controller/channel set to SSI */
50 * ch: The channel on the DMA controller (0, 1, 2, or 3)
56 unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); in guts_set_dmuxcr()
58 clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift); in guts_set_dmuxcr()
65 * machine_data: machine-specific ASoC device data
71 struct snd_soc_dai_link dai[2];
77 unsigned int dma_id[2]; /* 0 = DMA1, 1 = DMA2, etc */
78 unsigned int dma_channel_id[2]; /* 0 = ch 0, 1 = ch 1, etc*/
[all …]
H A Dfsl_dma.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
16 #include <linux/dma-mapping.h>
70 #define NUM_DMA_LINKS 2
72 /** fsl_dma_private: p-substream DMA data
74 * Each substream has a 1-to-1 association with a DMA channel.
76 * The link[] array is first because it needs to be aligned on a 32-byte
120 * Since each link descriptor has a 32-bit byte count field, we set
121 * period_bytes_max to the largest 32-bit number. We also have no maximum
125 * limitation in the SSI driver requires the sample rates for playback and
[all …]
H A Dp1022_ds.c1 // SPDX-License-Identifier: GPL-2.0
21 /* P1022-specific PMUXCR and DMUXCR bit definitions */
31 #define CCSR_GUTS_DMUXCR_SSI 2 /* DMA controller/channel set to SSI */
43 * ch: The channel on the DMA controller (0, 1, 2, or 3)
49 unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); in guts_set_dmuxcr()
51 clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift); in guts_set_dmuxcr()
58 * machine_data: machine-specific ASoC device data
64 struct snd_soc_dai_link dai[2];
71 unsigned int dma_id[2]; /* 0 = DMA1, 1 = DMA2, etc */
72 unsigned int dma_channel_id[2]; /* 0 = ch 0, 1 = ch 1, etc*/
[all …]
/linux/drivers/hsi/clients/
H A Dssi_protocol.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Implementation of the SSI McSAAB improved protocol.
41 #define SSIP_MAX_CMDS 5 /* Number of pre-allocated commands buffers */
42 #define SSIP_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1)
45 * SSI protocol command definitions
52 #define SSIP_BOOTINFO_RESP 2
101 * struct ssi_protocol - SSI protocol (McSAAB) data
111 * @keep_alive: Workaround for SSI HW bug
133 struct timer_list keep_alive; /* wake-up workaround */
146 /* List of ssi protocol instances */
[all …]
/linux/sound/soc/renesas/
H A Drz-ssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas RZ/G2L ASoC Serial Sound Interface (SSIF-2) Driver
28 /* SSI REGISTER BITS */
53 #define SSIFCR_RIE BIT(2)
75 #define SSI_RATES SNDRV_PCM_RATE_8000_48000 /* 8k-48kHz */
77 #define SSI_CHAN_MIN 2
78 #define SSI_CHAN_MAX 2
86 int fifo_sample_size; /* sample capacity of SSI FIFO */
99 int (*transfer)(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm);
118 * The SSI supports full-duplex transmission and reception.
[all …]
/linux/sound/soc/renesas/rcar/
H A Dssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SSIU/SSI support
13 * SSI interrupt status debug message when debugging
36 #define CHNL_6 (2u << 22) /* Channels */
41 #define DWL_18 (2u << 19) /* Data Word Length */
51 #define SWL_24 (2 << 16) /* R/W System Word Length */
63 #define EN (1 << 0) /* SSI Modul
115 rsnd_ssi_is_parent(ssi,io) global() argument
125 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_use_busif() local
272 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_master_clk_start() local
348 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_master_clk_stop() local
373 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_config_init() local
461 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_register_setup() local
477 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_init() local
507 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_quit() local
556 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_start() local
589 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_stop() local
813 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_common_probe() local
855 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_common_remove() local
879 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_pio_interrupt() local
923 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_pio_init() local
940 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_pio_pointer() local
1039 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); rsnd_ssi_debug_info() local
1166 struct rsnd_ssi *ssi; rsnd_ssi_probe() local
1247 struct rsnd_ssi *ssi; rsnd_ssi_remove() local
[all...]
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SRU/SCU/SSIU/SSI support
12 * Renesas R-Car sound device structure
17 * - SRC : Sampling Rate Converter
18 * - CMD
19 * - CTU : Channel Count Conversion Unit
20 * - MIX : Mixer
21 * - DVC : Digital Volume and Mute Function
22 * - SSI : Serial Sound Interface
27 * - SRC : Sampling Rate Converter
[all …]
H A Ddma.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car Audio DMAC support
52 #define rsnd_priv_to_dmac(p) ((struct rsnd_dma_ctrl *)(p)->dma)
54 #define rsnd_dma_to_dmaen(dma) (&(dma)->dma.en)
55 #define rsnd_dma_to_dmapp(dma) (&(dma)->dma.pp)
86 return snd_dmaengine_pcm_trigger(io->substream, SNDRV_PCM_TRIGGER_STOP); in rsnd_dmaen_stop()
101 if (dmaen->chan) in rsnd_dmaen_cleanup()
102 snd_dmaengine_pcm_close_release_chan(io->substream); in rsnd_dmaen_cleanup()
104 dmaen->chan = NULL; in rsnd_dmaen_cleanup()
118 if (dmaen->chan) in rsnd_dmaen_prepare()
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,ssi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
16 playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
18 DMA controller to use, but the channels themselves are hard-wired. The
22 "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
[all …]
H A Dfsl,imx-audio-es8328.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,imx-audio-es8328.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
14 - $ref: sound-card-common.yaml#
18 const: fsl,imx-audio-es8328
22 description: The user-visible name of this sound complex
24 ssi-controller:
[all …]
H A Deukrea-tlv320.txt5 - compatible : "eukrea,asoc-tlv320"
7 - eukrea,model : The user-visible name of this sound complex.
9 - ssi-controller : The phandle of the SSI controller.
11 - fsl,mux-int-port : The internal port of the i.MX audio muxer (AUDMUX).
13 - fsl,mux-ext-port : The external port of the i.MX audio muxer.
21 compatible = "eukrea,asoc-tlv320";
22 eukrea,model = "imx51-eukrea-tlv320aic23";
23 ssi-controller = <&ssi2>;
24 fsl,mux-int-port = <2>;
25 fsl,mux-ext-port = <3>;
/linux/Documentation/devicetree/bindings/spi/
H A Dsnps,dw-apb-ssi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
13 - $ref: spi-controller.yaml#
14 - if:
19 - mscc,ocelot-spi
20 - mscc,jaguar2-spi
24 minItems: 2
[all …]
/linux/drivers/hsi/controllers/
H A Domap_ssi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* OMAP SSI internal interface.
23 #define SSI_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1)
28 * struct omap_ssm_ctx - OMAP synchronous serial module (TX/RX) context
50 * struct omap_ssi_port - OMAP SSI port data
53 * @sst_dma: SSI transmitter physical base address
54 * @ssr_dma: SSI receiver physical base address
55 * @sst_base: SSI transmitter base address
56 * @ssr_base: SSI receiver base address
58 * @lock: Spin lock to serialize access to the SSI port
[all …]
H A Domap_ssi_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Hardware definitions for SSI.
13 * SSI SYS registers
31 #define SSI_MPU_STATUS_REG(port, irq) (0x808 + ((port) * 0x10) + ((irq) * 2))
48 * SSI SST registers
55 # define SSI_MODE_FRAME 2
75 * SSI SSR registers
95 * SSI GDD registers
107 # define SSI_FREE (1 << 2)
115 # define SSI_DST_BURST_4x32_BIT (2 << 14)
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E2 (R8A77940) SoC
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
[all …]
H A Dr8a7793.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-N (R8A77930) SoC
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7793-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
37 compatible = "fixed-clock";
[all …]
H A Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
H A Dr8a7790.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
46 compatible = "fixed-clock";
[all …]
/linux/arch/mips/boot/dts/ingenic/
H A Dcu1000-neo.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/ingenic,sysost.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "yna,cu1000-neo", "ingenic,x1000e";
11 model = "YSH & ATIL General Board CU1000-Neo";
18 stdout-path = "serial2:115200n8";
27 compatible = "gpio-leds";
28 led-0 {
[all …]
/linux/drivers/spi/
H A Dspi-dw.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/spi/spi-mem.h>
14 /* Synopsys DW SSI IP-core virtual IDs */
18 /* Synopsys DW SSI component versions (FourCC sequence) */
21 /* DW SSI IP-core ID and version check helpers */
23 ((_dws)->ip == DW_ ## _ip ## _ID)
26 (dw_spi_ip_is(_dws, _ip) && (_dws)->ver _op DW_ ## _ip ## _ ## _ver)
36 /* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */
65 /* Bit fields in CTRLR0 (DWC APB SSI) */
89 /* Bit fields in CTRLR0 (DWC SSI with AHB interface) */
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g043.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/r9a07g043-cpg.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 audio_clk1: audio1-clk {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
19 clock-frequency = <0>;
22 audio_clk2: audio2-clk {
23 compatible = "fixed-clock";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx53-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
[all …]
/linux/drivers/media/dvb-frontends/cxd2880/
H A Dcxd2880_tnrdmd_dvbt_mon.c1 // SPDX-License-Identifier: GPL-2.0
4 * Sony CXD2880 DVB-T2/T tuner + demodulator driver
5 * DVB-T monitor functions
17 {-93000, -91000, -90000, -89000, -88000},
18 {-87000, -85000, -84000, -83000, -82000},
19 {-82000, -80000, -78000, -77000, -76000},
33 return -EINVAL; in cxd2880_tnrdmd_dvbt_mon_sync_stat()
35 if (tnr_dmd->state != CXD2880_TNRDMD_STATE_ACTIVE) in cxd2880_tnrdmd_dvbt_mon_sync_stat()
36 return -EINVAL; in cxd2880_tnrdmd_dvbt_mon_sync_stat()
37 if (tnr_dmd->sys != CXD2880_DTV_SYS_DVBT) in cxd2880_tnrdmd_dvbt_mon_sync_stat()
[all …]

1234567