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/linux/drivers/crypto/cavium/nitrox/
H A Dnitrox_reqmgr.c55 static void softreq_unmap_sgbufs(struct nitrox_softreq *sr) in softreq_unmap_sgbufs() argument
57 struct nitrox_device *ndev = sr->ndev; in softreq_unmap_sgbufs()
61 dma_unmap_sg(dev, sr->in.sg, sg_nents(sr->in.sg), in softreq_unmap_sgbufs()
63 dma_unmap_single(dev, sr->in.sgcomp_dma, sr->in.sgcomp_len, in softreq_unmap_sgbufs()
65 kfree(sr->in.sgcomp); in softreq_unmap_sgbufs()
66 sr->in.sg = NULL; in softreq_unmap_sgbufs()
67 sr->in.sgmap_cnt = 0; in softreq_unmap_sgbufs()
69 dma_unmap_sg(dev, sr->out.sg, sg_nents(sr->out.sg), in softreq_unmap_sgbufs()
71 dma_unmap_single(dev, sr->out.sgcomp_dma, sr->out.sgcomp_len, in softreq_unmap_sgbufs()
73 kfree(sr->out.sgcomp); in softreq_unmap_sgbufs()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_dmcu.h33 SR(DMCU_CTRL), \
34 SR(DMCU_STATUS), \
35 SR(DMCU_RAM_ACCESS_CTRL), \
36 SR(DMCU_IRAM_WR_CTRL), \
37 SR(DMCU_IRAM_WR_DATA), \
38 SR(MASTER_COMM_DATA_REG1), \
39 SR(MASTER_COMM_DATA_REG2), \
40 SR(MASTER_COMM_DATA_REG3), \
41 SR(MASTER_COMM_CMD_REG), \
42 SR(MASTER_COMM_CNTL_REG), \
[all …]
H A Ddce_abm.h33 SR(MASTER_COMM_CNTL_REG), \
34 SR(MASTER_COMM_CMD_REG), \
35 SR(MASTER_COMM_DATA_REG1)
39 SR(DC_ABM1_HG_SAMPLE_RATE), \
40 SR(DC_ABM1_LS_SAMPLE_RATE), \
41 SR(BL1_PWM_BL_UPDATE_SAMPLE_RATE), \
42 SR(DC_ABM1_HG_MISC_CTRL), \
43 SR(DC_ABM1_IPCSC_COEFF_SEL), \
44 SR(BL1_PWM_CURRENT_ABM_LEVEL), \
45 SR(BL1_PWM_TARGET_ABM_LEVEL), \
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/
H A Ddcn30_dwb.h31 SR(DWB_ENABLE_CLK_CTRL),\
32 SR(DWB_MEM_PWR_CTRL),\
33 SR(FC_MODE_CTRL),\
34 SR(FC_FLOW_CTRL),\
35 SR(FC_WINDOW_START),\
36 SR(FC_WINDOW_SIZE),\
37 SR(FC_SOURCE_SIZE),\
38 SR(DWB_UPDATE_CTRL),\
39 SR(DWB_CRC_CTRL),\
40 SR(DWB_CRC_MASK_R_G),\
[all …]
/linux/arch/parisc/include/asm/
H A Duaccess.h23 #define LDD_USER(sr, val, ptr) __get_user_asm64(sr, val, ptr) argument
24 #define STD_USER(sr, x, ptr) __put_user_asm64(sr, x, ptr) argument
26 #define LDD_USER(sr, val, ptr) __get_user_asm(sr, val, "ldd", ptr) argument
27 #define STD_USER(sr, x, ptr) __put_user_asm(sr, "std", x, ptr) argument
30 #define __get_user_internal(sr, val, ptr) \ argument
35 case 1: __get_user_asm(sr, val, "ldb", ptr); break; \
36 case 2: __get_user_asm(sr, val, "ldh", ptr); break; \
37 case 4: __get_user_asm(sr, val, "ldw", ptr); break; \
38 case 8: LDD_USER(sr, val, ptr); break; \
45 #define __probe_user_internal(sr, error, ptr) \ argument
[all …]
/linux/drivers/rtc/
H A Drtc-isl1208.c189 static int isl1208_set_xtoscb(struct i2c_client *client, int sr, int xtosb_val) in isl1208_set_xtoscb() argument
192 if (!!(sr & ISL1208_REG_SR_XTOSCB) == xtosb_val) in isl1208_set_xtoscb()
196 sr |= ISL1208_REG_SR_XTOSCB; in isl1208_set_xtoscb()
198 sr &= ~ISL1208_REG_SR_XTOSCB; in isl1208_set_xtoscb()
200 return i2c_smbus_write_byte_data(client, ISL1208_REG_SR, sr); in isl1208_set_xtoscb()
302 int sr, dtr, atr, usr; in isl1208_rtc_proc() local
304 sr = isl1208_i2c_get_sr(client); in isl1208_rtc_proc()
305 if (sr < 0) { in isl1208_rtc_proc()
306 dev_err(&client->dev, "%s: reading SR failed\n", __func__); in isl1208_rtc_proc()
307 return sr; in isl1208_rtc_proc()
[all …]
/linux/net/tipc/
H A Dname_table.c91 #define service_range_upper(sr) ((sr)->upper) argument
99 #define service_range_overlap(sr, start, end) \ in RB_DECLARE_CALLBACKS_MAX() argument
100 ((sr)->lower <= (end) && (sr)->upper >= (start)) in RB_DECLARE_CALLBACKS_MAX()
105 * @sr: the service range pointer as a loop cursor in RB_DECLARE_CALLBACKS_MAX()
110 #define service_range_foreach_match(sr, sc, start, end) \ in RB_DECLARE_CALLBACKS_MAX() argument
111 for (sr = service_range_match_first((sc)->ranges.rb_node, \ in RB_DECLARE_CALLBACKS_MAX()
114 sr; \
115 sr = service_range_match_next(&(sr)->tree_node, \
131 struct service_range *sr; local
152 sr = service_range_entry(n);
[all …]
/linux/arch/mips/alchemy/devboards/
H A Dplatform.c81 struct resource *sr; in db1x_register_pcmcia_socket() local
90 sr = kzalloc_objs(struct resource, cnt); in db1x_register_pcmcia_socket()
91 if (!sr) in db1x_register_pcmcia_socket()
100 sr[0].name = "pcmcia-attr"; in db1x_register_pcmcia_socket()
101 sr[0].flags = IORESOURCE_MEM; in db1x_register_pcmcia_socket()
102 sr[0].start = pcmcia_attr_start; in db1x_register_pcmcia_socket()
103 sr[0].end = pcmcia_attr_end; in db1x_register_pcmcia_socket()
105 sr[1].name = "pcmcia-mem"; in db1x_register_pcmcia_socket()
106 sr[1].flags = IORESOURCE_MEM; in db1x_register_pcmcia_socket()
107 sr[1].start = pcmcia_mem_start; in db1x_register_pcmcia_socket()
[all …]
/linux/io_uring/
H A Dnet.c203 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); in io_mshot_prep_retry() local
206 sr->done_io = 0; in io_mshot_prep_retry()
207 sr->flags &= ~IORING_RECV_RETRY_CLEAR; in io_mshot_prep_retry()
208 sr->len = sr->mshot_len; in io_mshot_prep_retry()
243 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); in io_compat_msg_copy_hdr() local
247 if (copy_from_user(msg, sr->umsg_compat, sizeof(*msg))) in io_compat_msg_copy_hdr()
257 sr->len = 0; in io_compat_msg_copy_hdr()
265 sr->len = tmp_iov.iov_len; in io_compat_msg_copy_hdr()
293 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); in io_msg_copy_hdr() local
294 struct user_msghdr __user *umsg = sr->umsg; in io_msg_copy_hdr()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn31/
H A Ddcn31_hubbub.h33 SR(DCHVM_CTRL0),\
34 SR(DCHVM_MEM_CTRL),\
35 SR(DCHVM_CLK_CTRL),\
36 SR(DCHVM_RIOMMU_CTRL0),\
37 SR(DCHVM_RIOMMU_STAT0),\
38 SR(DCHUBBUB_DET0_CTRL),\
39 SR(DCHUBBUB_DET1_CTRL),\
40 SR(DCHUBBUB_DET2_CTRL),\
41 SR(DCHUBBUB_DET3_CTRL),\
42 SR(DCHUBBUB_COMPBUF_CTRL),\
[all …]
/linux/drivers/gpu/drm/amd/display/dc/pg/dcn35/
H A Ddcn35_pg_cntl.h33 SR(DOMAIN0_PG_CONFIG), \
34 SR(DOMAIN1_PG_CONFIG), \
35 SR(DOMAIN2_PG_CONFIG), \
36 SR(DOMAIN3_PG_CONFIG), \
37 SR(DOMAIN16_PG_CONFIG), \
38 SR(DOMAIN17_PG_CONFIG), \
39 SR(DOMAIN18_PG_CONFIG), \
40 SR(DOMAIN19_PG_CONFIG), \
41 SR(DOMAIN22_PG_CONFIG), \
42 SR(DOMAIN23_PG_CONFIG), \
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_reg_sr.c28 struct xe_reg_sr *sr = arg; in reg_sr_fini() local
32 xa_for_each(&sr->xa, reg, entry) in reg_sr_fini()
35 xa_destroy(&sr->xa); in reg_sr_fini()
38 int xe_reg_sr_init(struct xe_reg_sr *sr, const char *name, struct xe_device *xe) in xe_reg_sr_init() argument
40 xa_init(&sr->xa); in xe_reg_sr_init()
41 sr->name = name; in xe_reg_sr_init()
43 return drmm_add_action_or_reset(&xe->drm, reg_sr_fini, sr); in xe_reg_sr_init()
64 static void reg_sr_inc_error(struct xe_reg_sr *sr) in reg_sr_inc_error() argument
67 sr->errors++; in reg_sr_inc_error()
71 int xe_reg_sr_add(struct xe_reg_sr *sr, in xe_reg_sr_add() argument
[all …]
/linux/arch/arm/mach-omap2/
H A Dsmartreflex-class3.c15 static int sr_class3_enable(struct omap_sr *sr) in sr_class3_enable() argument
17 unsigned long volt = voltdm_get_voltage(sr->voltdm); in sr_class3_enable()
21 __func__, sr->name); in sr_class3_enable()
25 omap_vp_enable(sr->voltdm); in sr_class3_enable()
26 return sr_enable(sr, volt); in sr_class3_enable()
29 static int sr_class3_disable(struct omap_sr *sr, int is_volt_reset) in sr_class3_disable() argument
31 sr_disable_errgen(sr); in sr_class3_disable()
32 omap_vp_disable(sr->voltdm); in sr_class3_disable()
33 sr_disable(sr); in sr_class3_disable()
35 voltdm_reset(sr->voltdm); in sr_class3_disable()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
H A Ddcn314_dccg.h37 SR(DPPCLK_DTO_CTRL),\
43 SR(PHYASYMCLK_CLOCK_CNTL),\
44 SR(PHYBSYMCLK_CLOCK_CNTL),\
45 SR(PHYCSYMCLK_CLOCK_CNTL),\
46 SR(PHYDSYMCLK_CLOCK_CNTL),\
47 SR(PHYESYMCLK_CLOCK_CNTL),\
48 SR(DPSTREAMCLK_CNTL),\
49 SR(HDMISTREAMCLK_CNTL),\
50 SR(SYMCLK32_SE_CNTL),\
51 SR(SYMCLK32_LE_CNTL),\
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
H A Ddcn31_dccg.h32 SR(DPPCLK_DTO_CTRL),\
38 SR(PHYASYMCLK_CLOCK_CNTL),\
39 SR(PHYBSYMCLK_CLOCK_CNTL),\
40 SR(PHYCSYMCLK_CLOCK_CNTL),\
41 SR(PHYDSYMCLK_CLOCK_CNTL),\
42 SR(PHYESYMCLK_CLOCK_CNTL),\
43 SR(DPSTREAMCLK_CNTL),\
44 SR(HDMISTREAMCLK_CNTL),\
45 SR(SYMCLK32_SE_CNTL),\
46 SR(SYMCLK32_LE_CNTL),\
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/
H A Ddcn21_hubbub.h31 SR(DCHUBBUB_ARB_FRAC_URG_BW_NOM_A),\
32 SR(DCHUBBUB_ARB_FRAC_URG_BW_NOM_B),\
33 SR(DCHUBBUB_ARB_FRAC_URG_BW_NOM_C),\
34 SR(DCHUBBUB_ARB_FRAC_URG_BW_NOM_D),\
35 SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A),\
36 SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B),\
37 SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C),\
38 SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D),\
39 SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A),\
40 SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B),\
[all …]
/linux/tools/testing/selftests/kvm/arm64/
H A Dvgic_init.c769 #define SR(r) \ macro
776 SR(SYS_ICC_PMR_EL1),
777 SR(SYS_ICC_BPR0_EL1),
778 SR(SYS_ICC_AP0R0_EL1),
779 SR(SYS_ICC_AP0R1_EL1),
780 SR(SYS_ICC_AP0R2_EL1),
781 SR(SYS_ICC_AP0R3_EL1),
782 SR(SYS_ICC_AP1R0_EL1),
783 SR(SYS_ICC_AP1R1_EL1),
784 SR(SYS_ICC_AP1R2_EL
824 test_sysreg_array(int gic,const struct sr_def * sr,int nr,int (* check)(int,const struct sr_def *,const char *)) test_sysreg_array() argument
874 check_unaccessible_el1_regs(int gic,const struct sr_def * sr,const char * what) check_unaccessible_el1_regs() argument
913 check_unaccessible_el2_regs(int gic,const struct sr_def * sr,const char * what) check_unaccessible_el2_regs() argument
[all...]
/linux/include/linux/power/
H A Dsmartreflex.h210 * @sensor_voltdm_name: Name of voltdomain of SR instance
217 * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR.
232 * @notify: API to notify the class driver about an event in SR.
236 * Can be used by the SR driver to take any class
240 int (*enable)(struct omap_sr *sr);
241 int (*disable)(struct omap_sr *sr, int is_volt_reset);
242 int (*configure)(struct omap_sr *sr);
243 int (*notify)(struct omap_sr *sr, u32 status);
268 * @senp_mod: SENPENABLE value of the sr CONFIG register
269 * @senn_mod: SENNENABLE value for sr CONFIG register
[all …]
/linux/drivers/macintosh/
H A Dwindfarm_core.c279 struct wf_sensor *sr = container_of(kref, struct wf_sensor, ref); in wf_sensor_release() local
281 DBG("wf: Deleting sensor %s\n", sr->name); in wf_sensor_release()
283 if (sr->ops && sr->ops->release) in wf_sensor_release()
284 sr->ops->release(sr); in wf_sensor_release()
286 kfree(sr); in wf_sensor_release()
304 struct wf_sensor *sr; in wf_register_sensor() local
307 list_for_each_entry(sr, &wf_sensors, link) { in wf_register_sensor()
308 if (!strcmp(sr->name, new_sr->name)) { in wf_register_sensor()
310 " duplicate sensor %s\n", sr->name); in wf_register_sensor()
337 void wf_unregister_sensor(struct wf_sensor *sr) in wf_unregister_sensor() argument
[all …]
H A Dwindfarm_pm112.c274 struct wf_sensor *sr; in cpu_fans_tick() local
281 sr = sens_cpu_temp[cpu]; in cpu_fans_tick()
282 err = sr->ops->get_value(sr, &temp); in cpu_fans_tick()
296 sr = sens_cpu_power[cpu]; in cpu_fans_tick()
297 err = sr->ops->get_value(sr, &power); in cpu_fans_tick()
603 static void pm112_new_sensor(struct wf_sensor *sr) in pm112_new_sensor() argument
607 if (!strncmp(sr->name, "cpu-temp-", 9)) { in pm112_new_sensor()
608 i = sr->name[9] - '0'; in pm112_new_sensor()
609 if (sr->name[10] == 0 && i < NR_CORES && in pm112_new_sensor()
610 sens_cpu_temp[i] == NULL && wf_get_sensor(sr) == 0) in pm112_new_sensor()
[all …]
/linux/fs/xfs/scrub/
H A Drtrefcount.c44 error = xchk_rtgroup_init(sc, sc->sm->sm_agno, &sc->sr); in xchk_setup_rtrefcountbt()
52 error = xchk_install_live_inode(sc, rtg_refcount(sc->sr.rtg)); in xchk_setup_rtrefcountbt()
56 return xchk_rtgroup_lock(sc, &sc->sr, XCHK_RTGLOCK_ALL); in xchk_setup_rtrefcountbt()
315 if (!sc->sr.rmap_cur || xchk_skip_xref(sc->sm)) in xchk_rtrefcountbt_xref_rmap()
325 error = xfs_rmap_query_range(sc->sr.rmap_cur, &low, &high, in xchk_rtrefcountbt_xref_rmap()
327 if (!xchk_should_check_xref(sc, &error, &sc->sr.rmap_cur)) in xchk_rtrefcountbt_xref_rmap()
332 xchk_btree_xref_set_corrupt(sc, sc->sr.rmap_cur, 0); in xchk_rtrefcountbt_xref_rmap()
351 xfs_rgbno_to_rtb(sc->sr.rtg, irec->rc_startblock), in xchk_rtrefcountbt_xref()
438 if (bno <= rrc->next_unshared_rgbno || !sc->sr.rmap_cur || in xchk_rtrefcountbt_xref_gaps()
447 error = xfs_rmap_query_range(sc->sr.rmap_cur, &low, &high, in xchk_rtrefcountbt_xref_gaps()
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dbrcm,iproc-clocks.yaml40 - brcm,sr-genpll0
41 - brcm,sr-genpll1
42 - brcm,sr-genpll2
43 - brcm,sr-genpll3
44 - brcm,sr-genpll4
45 - brcm,sr-genpll5
46 - brcm,sr-genpll6
47 - brcm,sr-lcpll0
48 - brcm,sr-lcpll1
49 - brcm,sr-lcpll-pcie
[all …]
/linux/drivers/gpu/drm/
H A Ddrm_self_refresh_helper.c28 * framework to implement panel self refresh (SR) support. Drivers are
29 * responsible for initializing and cleaning up the SR helpers on load/unload
32 * &drm_connector_state.self_refresh_aware to true at runtime if it is SR-aware
35 * Once a crtc has enabled SR using &drm_self_refresh_helper_init, the
37 * SR as appropriate. The best way to think about this is that it's a DPMS
39 * that tells you to disable/enable SR on the panel instead of power-cycling it.
41 * During SR, drivers may choose to fully disable their crtc/encoder/bridge
46 * SR will be deactivated if there are any atomic updates affecting the
47 * pipe that is in SR mode. If a crtc is driving multiple connectors, all
48 * connectors must be SR aware and all will enter/exit SR mode at the same time.
[all …]
/linux/Documentation/PCI/
H A Dpci-iov-howto.rst15 What is SR-IOV
18 Single Root I/O Virtualization (SR-IOV) is a PCI Express Extended
34 How can I enable SR-IOV capability
37 Multiple methods are available for SR-IOV enablement.
39 enabling and disabling of the capability via API provided by SR-IOV core.
40 If the hardware has SR-IOV capability, loading its PF driver would
63 SR-IOV API
66 To enable SR-IOV capability:
79 To disable SR-IOV capability:
91 command below before enabling SR-IOV capabilities. This is the
[all …]
/linux/arch/m68k/include/asm/
H A Dirqflags.h13 asm volatile ("movew %%sr,%0" : "=d" (flags) : : "memory"); in arch_local_save_flags()
21 "move %/sr,%%d0 \n\t" in arch_local_irq_disable()
23 "move %%d0,%/sr \n" in arch_local_irq_disable()
28 asm volatile ("oriw #0x0700,%%sr" : : : "memory"); in arch_local_irq_disable()
36 "move %/sr,%%d0 \n\t" in arch_local_irq_enable()
38 "move %%d0,%/sr \n" in arch_local_irq_enable()
47 "andiw %0,%%sr" in arch_local_irq_enable()
63 asm volatile ("movew %0,%%sr" : : "d" (flags) : "memory"); in arch_local_irq_restore()

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