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Searched +full:sr +full:- +full:pcie +full:- +full:phy (Results 1 – 25 of 41) sorted by relevance

12

/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dbrcm,sr-pcie-phy.txt1 Broadcom Stingray PCIe PHY
4 - compatible: must be "brcm,sr-pcie-phy"
5 - reg: base address and length of the PCIe SS register space
6 - brcm,sr-cdru: phandle to the CDRU syscon node
7 - brcm,sr-mhb: phandle to the MHB syscon node
8 - #phy-cells: Must be 1, denotes the PHY index
11 PHY index goes from 0 to 7
13 For the internal PAXC based root complex, PHY index is always 8
17 compatible = "brcm,sr-mhb", "syscon";
22 compatible = "brcm,sr-cdru", "syscon";
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H A Dbrcm,sr-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/brcm,sr-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom Stingray PCIe PHY
10 - Ray Jui <ray.jui@broadcom.com>
14 PHY index goes from 0 to 7.
16 For the internal PAXC based root complex, PHY index is always 8.
20 const: brcm,sr-pcie-phy
25 '#phy-cells':
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/
H A Dstingray-pcie.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
6 pcie8: pcie@60400000 {
7 compatible = "brcm,iproc-pcie-paxc-v
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dbrcm,iproc-clocks.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/brcm,iproc-clocks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <rjui@broadcom.com>
11 - Scott Branden <sbranden@broadcom.com>
25 - brcm,bcm63138-armpll
26 - brcm,cygnus-armpll
27 - brcm,cygnus-genpll
28 - brcm,cygnus-lcpll0
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H A Dbrcm,iproc-clocks.txt4 Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible:
14 Should have a value of the form "brcm,<soc>-<pll>". For example, GENPLL on
15 Cygnus has a compatible string of "brcm,cygnus-genpll"
17 - #clock-cells:
20 - reg:
24 - clocks:
28 - clock-output-names:
34 #clock-cells = <0>;
35 compatible = "fixed-clock";
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dsyscon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 represent as any specific type of device. The typical use-case is
13 for some other node's driver, or platform-specific code, to acquire
20 - Lee Jones <lee@kernel.org>
30 - airoha,en7581-pbus-csr
31 - al,alpine-sysfabric-service
32 - allwinner,sun8i-a83t-system-controller
33 - allwinner,sun8i-h3-system-controller
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl,enetc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 supports virtualization/isolation based on PCIe Single Root IO Virtualization
12 (SR-IOV), advanced QoS with 8 traffic classes and 4 drop resilience levels,
16 - Frank Li <Frank.Li@nxp.com>
17 - Vladimir Oltean <vladimir.oltean@nxp.com>
18 - Wei Fang <wei.fang@nxp.com>
19 - Claudiu Manoil <claudiu.manoil@nxp.com>
24 - items:
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/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Dcn9132-clearfog.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 #include "cn9132-sr-cex7.dtsi"
19 compatible = "solidrun,cn9132-clearfog",
20 "solidrun,cn9132-sr-cex7", "marvell,cn9130";
32 gpio-keys {
33 compatible = "gpio-keys";
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H A Dcn9130-cf-pro.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 #include "cn9130-sr-som.dtsi"
16 #include "cn9130-cf.dtsi"
20 compatible = "solidrun,cn9130-clearfog-pro",
21 "solidrun,cn9130-sr-som", "marvell,cn9130";
23 gpio-keys {
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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am642-hummingboard-t.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2023 Josua Mayer <josua@solid-run.com>
5 * DTS for SolidRun AM642 HummingBoard-T,
10 /dts-v1/;
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/phy/phy.h>
15 #include "k3-am642.dtsi"
16 #include "k3-am642-sr-som.dtsi"
19 model = "SolidRun AM642 HummingBoard-T";
20 compatible = "solidrun,am642-hummingboard-t", "solidrun,am642-sr-som", "ti,am642";
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/freebsd/share/man/man4/
H A Dice.42 .\" SPDX-License-Identifier: BSD-3-Clause
4 .\" Copyright (c) 2019-2020, Intel Corporation
73 .Bl -bullet -compact
91 .Sx Link-Level Flow Control
103 .Sx Debugging PHY Statistics
113 .Sx Optics and auto-negotiation
115 .Sx PCI-Express Slot Bandwidth
236 To use RDMA monitoring, more MSI-X interrupts may need to be reserved.
241 .Bd -literal -offset indent
245 The number of extra MSI-X interrupt vectors may need to be adjusted.
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/freebsd/sys/arm64/conf/
H A Dstd.dev3 options PCI_HP # PCI-Express native HotPlug
4 options PCI_IOV # PCI SR-IOV support
65 device phy
76 # PCI/PCI-X/PCIe Ethernet NICs that use iflib infrastructure
105 device umass # Disks/Mass storage - Requires scbus and da
120 device mmio_sram # Generic on-chip SRAM
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmakalu.dts4 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 i-cache-line-size = <32>;
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H A Dkilauea.dts4 * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 i-cache-line-size = <32>;
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H A Dhaleakala.dts4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
27 #address-cells = <1>;
28 #size-cells = <0>;
34 clock-frequency = <0>; /* Filled in by U-Boot */
35 timebase-frequency = <0>; /* Filled in by U-Boot */
36 i-cache-line-size = <32>;
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H A Dglacier.dts4 * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de>
11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
30 #address-cells = <1>;
31 #size-cells = <0>;
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 timebase-frequency = <0>; /* Filled in by U-Boot */
39 i-cache-line-size = <32>;
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H A Dcanyonlands.dts4 * Copyright 2008-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 i-cache-line-size = <32>;
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H A Dicon.dts4 * Copyright 2010 DENX Software Engineering, Stefan Roese <sr@denx.de>
11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 i-cache-line-size = <32>;
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: regulator-pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
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/freebsd/sys/dev/e1000/
H A De1000_regs.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
38 #define E1000_CTRL 0x00000 /* Device Control - RW */
39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */
40 #define E1000_STATUS 0x00008 /* Device Status - RO */
41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
44 #define E1000_FLA 0x0001C /* Flash Access - RW */
45 #define E1000_MDIC 0x00020 /* MDI Control - RW */
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
57 7a29 PCI-to-PCI Bridge
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/freebsd/sys/dev/ixgbe/
H A Dixgbe_e610.c2 SPDX-License-Identifier: BSD-3-Clause
43 * ixgbe_init_aci - initialization routine for Admin Command Interface
50 ixgbe_init_lock(&hw->aci.lock); in ixgbe_init_aci()
54 * ixgbe_shutdown_aci - shutdown routine for Admin Command Interface
61 ixgbe_destroy_lock(&hw->aci.lock); in ixgbe_shutdown_aci()
65 * ixgbe_should_retry_aci_send_cmd_execute - decide if ACI command should
88 * ixgbe_aci_send_cmd_execute - execute sending FW Admin Command to FW Admin
99 * * - IXGBE_SUCCESS - success.
100 * * - IXGBE_ERR_ACI_DISABLED - CSR mechanism is not enabled.
101 * * - IXGBE_ERR_ACI_BUSY - CSR mechanism is busy.
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H A Dixgbe_type_e610.h2 SPDX-License-Identifier: BSD-3-Clause
50 #define DIVIDE_AND_ROUND_UP(a, b) (((a) + (b) - 1) / (b))
55 * ROUND_UP - round up to next arbitrary multiple (not a power of 2)
77 (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
80 (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
97 * ixgbe_struct_size - size of struct with C99 flexible array member
103 (sizeof(*(ptr)) + sizeof(*(ptr)->field) * (num))
185 * using ixgbe_read_netlist_module, we need to account for the 2-word TLV
393 #define IXGBE_TOOLS_ACI_EXPIRED_STAMP_SPACING_LO -5
399 /* Flags sub-structure
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/freebsd/sys/dev/pci/
H A Dpcireg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
141 #define PCIY_PCIX 0x07 /* PCI-X */
146 #define PCIY_HOTPLUG 0x0c /* PCI Hot-Plug */
147 #define PCIY_SUBVENDOR 0x0d /* PCI-PCI bridge subvendor ID */
151 #define PCIY_MSIX 0x11 /* MSI-X */
176 #define PCIZ_MFVC 0x0008 /* Multi-Function Virtual Channel */
180 #define PCIZ_CAC 0x000c /* Configuration Access Correction -- obsolete */
182 #define PCIZ_ARI 0x000e /* Alternative Routing-ID Interpretation */
200 #define PCIZ_M_PCIE 0x0020 /* PCIe over M-PHY */
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/freebsd/sys/dev/ice/
H A Dice_type.h1 /* SPDX-License-Identifier: BSD-3-Clause */
56 * DIV_S64 - Divide signed 64-bit value with signed 64-bit divisor
60 * Use DIV_S64 for any 64-bit divide which operates on signed 64-bit dividends.
61 * Do not use this for unsigned 64-bi
943 struct ice_phy_info phy; global() member
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