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Searched +full:sr +full:- +full:mhb (Results 1 – 7 of 7) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dbrcm,sr-pcie-phy.txt4 - compatible: must be "brcm,sr-pcie-phy"
5 - reg: base address and length of the PCIe SS register space
6 - brcm,sr-cdru: phandle to the CDRU syscon node
7 - brcm,sr-mhb: phandle to the MHB syscon node
8 - #phy-cells: Must be 1, denotes the PHY index
16 mhb: syscon@60401000 {
17 compatible = "brcm,sr-mhb", "syscon";
22 compatible = "brcm,sr-cdru", "syscon";
27 compatible = "brcm,sr-pcie-phy";
29 brcm,sr-cdru = <&cdru>;
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H A Dbrcm,sr-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/brcm,sr-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <ray.jui@broadcom.com>
20 const: brcm,sr-pcie-phy
25 '#phy-cells':
28 brcm,sr-cdru:
32 brcm,sr-mhb:
33 description: phandle to the MHB syscon node
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dbrcm,iproc-mhb.txt1 Broadcom iProc Multi Host Bridge (MHB)
3 Certain Broadcom iProc SoCs have a multi host bridge (MHB) block that controls
7 This node allows access to these MHB registers via syscon.
10 - compatible: should contain:
11 "brcm,sr-mhb", "syscon" for Stingray
12 - reg: base address and range of the MHB registers
15 mhb: syscon@60401000 {
16 compatible = "brcm,sr-mhb", "syscon";
H A Dsyscon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 represent as any specific type of device. The typical use-case is
13 for some other node's driver, or platform-specific code, to acquire
20 - Lee Jones <lee@kernel.org>
30 - airoha,en7581-pbus-csr
31 - al,alpine-sysfabric-service
32 - allwinner,sun8i-a83t-system-controller
33 - allwinner,sun8i-h3-system-controller
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/
H A Dstingray-pcie.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
7 compatible = "brcm,iproc-pcie-paxc-v2";
9 linux,pci-domain = <8>;
11 bus-rang
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H A Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a72";
49 enable-method = "psci";
50 next-level-cache = <&CLUSTER0_L2>;
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/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h1 /*-
34 * Copyright(c) 2001-2025, Broadcom. All rights reserved. The
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
126 /* Engine CKV - Authentication tag. */
128 /* Engine CKV - The encrypted data. */
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