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/linux/Documentation/devicetree/bindings/spi/
H A Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cs-high, etc. or they could
12 be controller specific like delay in clock or data lines, etc. These
14 per-peripheral and there can be multiple peripherals attached to a
20 - Mark Brown <broonie@kernel.org>
[all …]
/linux/drivers/iio/gyro/
H A Dadxrs450.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/delay.h>
14 #include <linux/spi/spi.h>
25 /* The MSB for the spi commands */
67 * struct adxrs450_state - device instance specific data
68 * @us: actual spi_device
69 * @buf_lock: mutex to protect tx and rx
70 * @tx: transmit buffer
74 struct spi_device *us; member
76 __be32 tx __aligned(IIO_DMA_MINALIGN);
[all …]
/linux/drivers/spi/
H A Dspi-dw-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
15 #include <linux/platform_data/dma-dw.h>
16 #include <linux/spi/spi.h>
19 #include "spi-dw.h"
30 if (s->dma_dev != chan->device->dev) in dw_spi_dma_chan_filter()
33 chan->private = s; in dw_spi_dma_chan_filter()
43 def_burst = dws->fifo_len / 2; in dw_spi_dma_maxburst_init()
45 ret = dma_get_slave_caps(dws->rxchan, &caps); in dw_spi_dma_maxburst_init()
51 dws->rxburst = min(max_burst, def_burst); in dw_spi_dma_maxburst_init()
[all …]
H A Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Designware SPI core controller driver (refer pxa2xx_spi.c)
10 #include <linux/dma-mapping.h>
15 #include <linux/delay.h>
17 #include <linux/spi/spi.h>
18 #include <linux/spi/spi-mem.h>
23 #include "spi-dw.h"
32 u32 rx_sample_dly; /* RX sample delay */
66 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
67 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
[all …]
H A Dspi-mpc512x-psc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC512x PSC in SPI mode driver.
7 * Hongjun Chen <hong-jun.chen@freescale.com>
21 #include <linux/delay.h>
23 #include <linux/spi/spi.h>
37 switch (mps->type) { \
39 struct mpc52xx_psc __iomem *psc = mps->psc; \
40 __ret = &psc->regname; \
44 struct mpc5125_psc __iomem *psc = mps->psc; \
45 __ret = &psc->regname; \
[all …]
H A Dspi-cadence.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Cadence SPI controller driver (host and target mode)
5 * Copyright (C) 2008 - 2014 Xilinx, Inc.
7 * based on Blackfin On-Chip SPI Driver (spi_bfin5xx.c)
11 #include <linux/delay.h>
22 #include <linux/spi/spi.h>
25 #define CDNS_SPI_NAME "cdns-spi"
34 #define CDNS_SPI_DR 0x18 /* Delay Register, RW */
42 * SPI Configuration Register bit Masks
45 * of the SPI controller
[all …]
H A Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 #include <linux/delay.h>
11 #include <linux/dma-mapping.h>
25 #include <linux/spi/spi.h>
30 #include <linux/dma/imx-dma.h>
42 "time in us to run a transfer in polling mode\n");
78 int (*prepare_transfer)(struct spi_imx_data *spi_imx, struct spi_device *spi,
114 void (*tx)(struct spi_imx_data *spi_imx); member
118 unsigned int txfifo; /* number of words pushed in tx FIFO */
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H A Dspi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Addy Ke <addy.ke@rock-chips.com>
14 #include <linux/spi/spi.h>
18 #define DRIVER_NAME "rockchip-spi"
25 /* SPI register offsets */
67 /* ss_n to sclk_out delay */
154 /* sclk_out: spi host internal logic in rk3x can support 50Mhz */
158 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
179 const void *tx; member
195 bool cs_inactive; /* spi target transmission stop when cs inactive */
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/linux/net/nfc/nci/
H A Dspi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/spi/spi.h>
12 #include <linux/crc-ccitt.h>
37 /* a NULL skb means we just want the SPI chip select line to raise */ in __nci_spi_send()
39 t.tx_buf = skb->data; in __nci_spi_send()
40 t.len = skb->len; in __nci_spi_send()
47 t.delay.value = nspi->xfer_udelay; in __nci_spi_send()
48 t.delay.unit = SPI_DELAY_UNIT_USECS; in __nci_spi_send()
49 t.speed_hz = nspi->xfer_speed_hz; in __nci_spi_send()
54 return spi_sync(nspi->spi, &m); in __nci_spi_send()
[all …]
/linux/Documentation/devicetree/bindings/input/
H A Dsyna,rmi4.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com
12 - Vincent Huang <vincent.huang@tw.synaptics.com>
16 devices using different transports (I2C, SPI) and different functions (e.g.
22 - syna,rmi4-i2c
23 - syna,rmi4-spi
28 '#address-cells':
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/linux/Documentation/networking/
H A Dpktgen.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
31 overload type of benchmarking, as this could hurt the normal use-case.
33 Specifically increasing the TX ring buffer in the NIC::
35 # ethtool -G ethX tx 1024
37 A larger TX ring can improve pktgen's performance, while it can hurt
38 in the general case, 1) because the TX ring buffer might get larger
43 TX ring cause delay. Drivers usually delay cleaning up the
44 ring-buffers for various performance reasons, and packets stalling
45 the TX ring might just be waiting for cleanup.
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp151c-mect1s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
21 stdout-path = "serial0:1500000n8";
33 v3v3: regulator-v3v3 {
34 compatible = "regulator-fixed";
[all …]
H A Dstm32mp151a-prtt1c.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp151a-prtt1l.dtsi"
14 clock_ksz9031: clock-ksz9031 {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <25000000>;
20 clock_sja1105: clock-sja1105 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
[all …]
/linux/arch/powerpc/boot/dts/
H A Dac14xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #address-cells = <1>;
15 #size-cells = <1>;
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
49 compatible = "cfi-flash";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 bank-width = <2>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-phyboard-polis-rdk.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include "imx8mm-phycore-som.dtsi"
15 model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
16 compatible = "phytec,imx8mm-phyboard-polis-rdk",
17 "phytec,imx8mm-phycore-som", "fsl,imx8mm";
20 stdout-path = &uart3;
[all …]
H A Dimx8mq-kontron-pitx-imx8m.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree File for the Kontron pitx-imx8m board.
8 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
14 model = "Kontron pITX-imx8m";
15 compatible = "kontron,pitx-imx8m", "fsl,imx8mq";
31 stdout-path = "serial2:115200n8";
34 pcie0_refclk: pcie0-clock {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
H A Dimx8mp-msc-sm2s.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/net/ti-dp83867.h>
18 stdout-path = &uart2;
21 reg_usb0_host_vbus: regulator-usb0-vbus {
22 compatible = "regulator-fixed";
23 regulator-name = "usb0_host_vbus";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_usb0_vbus>;
26 regulator-min-microvolt = <5000000>;
[all …]
H A Dimx95-19x19-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/usb/pd.h>
15 #define BRD_SM_CTRL_SD3_WAKE 0x8000 /* PCAL6408A-0 */
16 #define BRD_SM_CTRL_PCIE1_WAKE 0x8001 /* PCAL6408A-4 */
17 #define BRD_SM_CTRL_BT_WAKE 0x8002 /* PCAL6408A-5 */
18 #define BRD_SM_CTRL_PCIE2_WAKE 0x8003 /* PCAL6408A-6 */
19 #define BRD_SM_CTRL_BUTTON 0x8004 /* PCAL6408A-7 */
23 compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
[all …]
H A Dimx8mp-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
18 reg_wl_bt: regulator-wifi-bt {
19 compatible = "regulator-fixed";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_reg_wl_bt>;
22 regulator-name = "wl-bt-pow-dwn";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
26 startup-delay-us = <70000>;
27 regulator-always-on;
[all …]
H A Dimx95-tqma9596sa.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2024 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 /dts-v1/;
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include <dt-bindings/usb/pd.h>
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
[all …]
/linux/Documentation/networking/dsa/
H A Dsja1105.rst8 The NXP SJA1105 is a family of 10 SPI-managed automotive switches:
10 - SJA1105E: First generation, no TTEthernet
11 - SJA1105T: First generation, TTEthernet
12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
16 - SJA1110A: Third generation, TTEthernet, SGMII, integrated 100base-T1 and
17 100base-TX PHYs
18 - SJA1110B: Third generation, TTEthernet, SGMII, 100base-T1, 100base-TX
[all …]
/linux/drivers/input/rmi4/
H A Drmi_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2016 Synaptics Incorporated
11 #include <linux/spi/spi.h>
38 struct spi_device *spi; member
55 struct spi_device *spi = rmi_spi->spi; in rmi_spi_manage_pools() local
56 int buf_size = rmi_spi->xfer_buf_size in rmi_spi_manage_pools()
57 ? rmi_spi->xfer_buf_size : RMI_SPI_DEFAULT_XFER_BUF_SIZE; in rmi_spi_manage_pools()
68 tmp = rmi_spi->rx_buf; in rmi_spi_manage_pools()
69 buf = devm_kcalloc(&spi->dev, buf_size, 2, in rmi_spi_manage_pools()
72 return -ENOMEM; in rmi_spi_manage_pools()
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12b-odroid-n2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-g12b-odroid.dtsi"
14 dio2133: audio-amplifier-0 {
15 compatible = "simple-audio-amplifier";
16 enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
17 VCC-supply = <&vcc_5v>;
18 sound-name-prefix = "U19";
22 hub_5v: regulator-hub-5v {
23 compatible = "regulator-fixed";
24 regulator-name = "HUB_5V";
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-rock-3b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
13 compatible = "radxa,rock-3b", "rockchip,rk3568";
24 stdout-path = "serial2:1500000n8";
27 hdmi-con {
28 compatible = "hdmi-connector";
[all …]

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