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/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
19 - nvidia,tegra264-pmc
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/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
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/linux/tools/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
12 @echo ' acpi - ACPI tools'
13 @echo ' bpf - misc BPF tools'
14 @echo ' counter - counter tools'
15 @echo ' cpupower - a tool for all things x86 CPU power'
16 @echo ' debugging - tools for debugging'
17 @echo ' firewire - the userspace part of nosy, an IEEE-139
72 counter firewire hv guest bootconfig spi usb virtio mm bpf iio gpio objtool leds wmi pci firmware debugging tracing: FORCE global() target
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/linux/arch/powerpc/sysdev/
H A Dfsl_soc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 #include <linux/spi/spi.h>
37 static phys_addr_t immrbase = -1;
43 if (immrbase != -1) in get_immrbase()
63 static u32 sysfreq = -1; in fsl_get_sys_freq()
66 if (sysfreq != -1) in fsl_get_sys_freq()
71 return -1; in fsl_get_sys_freq()
73 of_property_read_u32(soc, "clock-frequency", &sysfreq); in fsl_get_sys_freq()
74 if (sysfreq == -1 || !sysfreq) in fsl_get_sys_freq()
75 of_property_read_u32(soc, "bus-frequency", &sysfreq); in fsl_get_sys_freq()
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/linux/drivers/soc/tegra/
H A Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
37 #include <linux/pinctrl/pinconf-generic.h>
57 #include <dt-bindings/interrupt-controller/arm-gic.h>
58 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
59 #include <dt-bindings/gpio/tegra186-gpio.h>
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/linux/drivers/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 # Rewritten to use lists instead of if-statements.
9 obj-y += cache/
10 obj-y += irqchip/
11 obj-y += bus/
13 obj-$(CONFIG_GENERIC_PHY) += phy/
16 obj-$(CONFIG_PINCTRL) += pinctrl/
17 obj-$(CONFIG_GPIOLIB) += gpio/
18 obj-y += pwm/
21 obj-y += leds/
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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/linux/drivers/crypto/ccp/
H A Dsev-dev.c1 // SPDX-License-Identifier: GPL-2.0-only
30 #include <linux/amd-iommu.h>
39 #include "psp-dev.h"
40 #include "sev-dev.h"
46 /* Minimum firmware version required for the SEV-SNP support */
51 * Maximum number of firmware-writable buffers that might be specified
56 /* Leave room in the descriptor array for an end-of-list indicator. */
106 * When SEV-SNP is enabled the TMR needs to be 2MB aligned and 2MB sized.
124 * Array containing range of pages that firmware transitions to HV-fixed
140 struct sev_device *sev = psp_master->sev_data; in sev_version_greater_or_equal()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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/linux/scripts/mod/
H A Dfile2alias.c5 * Copyright 2002-2003 Rusty Russell, IBM Corporation
20 #include "devicetable-offsets.h"
41 * module_alias_printf - add auto-generated MODULE_ALIAS()
45 * @fmt: printf(3)-like format
75 n = vsnprintf(new->str, len, fmt, ap); in module_alias_printf()
84 if (append_wildcard && (n == 0 || new->str[n - 1] != '*')) { in module_alias_printf()
85 new->str[n] = '*'; in module_alias_printf()
86 new->st in module_alias_printf()
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/linux/Documentation/virt/kvm/
H A Dapi.rst1 .. SPDX-License-Identifier: GPL-2.0
4 The Definitive KVM (Kernel-based Virtual Machine) API Documentation
24 - System ioctls: These query and set global attributes which affect the
28 - VM ioctls: These query and set attributes that affect an entire virtual
35 - vcpu ioctls: These query and set attributes that control the operation
43 - device ioctls: These query and set attributes that control the operation
92 facility that allows backward-compatible extensions to the API to be
133 -----------------------
150 -----------------
189 address used by the VM. The IPA_Bits is encoded in bits[7-0] of the
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/linux/drivers/pci/controller/
H A Dpci-hyperv.c1 // SPDX-License-Identifier: GPL-2.0
8 * This driver acts as a paravirtual front-end for PCI Express root buses.
9 * When a PCI Express function (either an entire device or an SR-IOV
13 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
18 * to the VM using this front-end will appear at "device 0", the domain will
24 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
28 * vector. This driver does not support level-triggered (line-based)
32 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
34 * by Hyper-V is mapped into a single page of memory space, and the
37 * the PCI back-end driver in Hyper-V.
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