/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | nxp-spifi.txt | 1 * NXP SPI Flash Interface (SPIFI) 3 NXP SPIFI is a specialized SPI interface for serial Flash devices. 4 It supports one Flash device with 1-, 2- and 4-bits width in SPI 6 mode. In memory mode the Flash is accessible from the CPU as 10 - compatible : Should be "nxp,lpc1773-spifi" 11 - reg : the first contains the register location and length, 13 - reg-names: Should contain the reg names "spifi" and "flash" 14 - interrupts : Should contain the interrupt for the device 15 - clocks : The clocks needed by the SPIFI controller 16 - clock-names : Should contain the clock names "spifi" and "reg" [all …]
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H A D | aspeed-smc.txt | 2 * Aspeed SPI Flash Memory Controller 5 three chip selects, two of which are always of SPI type and the third 6 can be SPI or NOR type flash. These bindings only describe SPI. 8 The two SPI flash memory controllers in the AST2500 each support two 12 - compatible : Should be one of 13 "aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller 14 "aspeed,ast2400-spi" for the AST2400 SPI Flash memory Controller 15 "aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller 16 "aspeed,ast2500-spi" for the AST2500 SPI flash memory controllers 18 - reg : the first contains the control register location and length, [all …]
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H A D | jedec,spi-nor.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SPI NOR flash ST M25Pxx (and similar) serial flash chips 10 - Rob Herring <robh@kernel.org> 13 - $ref: mtd.yaml# 14 - $ref: /schemas/spi/spi-peripheral-props.yaml# 19 - items: 20 - pattern: "^((((micron|spansion|st),)?\ [all …]
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H A D | jedec,spi-nor.txt | 1 * SPI NOR flash: ST M25Pxx (and similar) serial flash chips 4 - #address-cells, #size-cells : Must be present if the device has sub-nodes 6 - compatible : May include a device-specific string consisting of the 9 Must also include "jedec,spi-nor" for any SPI NOR flash that can 51 designate quirky versions of flash chips that do not support the 53 m25p05-nonjedec 54 m25p10-nonjedec 55 m25p20-nonjedec 56 m25p40-nonjedec 57 m25p80-nonjedec [all …]
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H A D | hisilicon,fmc-spi-nor.txt | 1 HiSilicon SPI-NOR Flash Controller 4 - compatible : Should be "hisilicon,fmc-spi-nor" and one of the following strings: 5 "hisilicon,hi3519-spi-nor" 6 - address-cells : Should be 1. 7 - size-cells : Should be 0. 8 - reg : Offset and length of the register set for the controller device. 9 - reg-names : Must include the following two entries: "control", "memory". 10 - clocks : handle to spi-nor flash controller clock. 13 spi-nor-controller@10000000 { 14 compatible = "hisilicon,hi3519-spi-nor", "hisilicon,fmc-spi-nor"; [all …]
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H A D | mtd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <miquel.raynal@bootlin.com> 11 - Richard Weinberger <richard@nod.at> 17 pattern: "^(flash|.*sram|nand)(@.*)?$" 21 User-defined MTD device name. Can be used to assign user friendly 22 names to MTD devices (instead of the flash model or flash controller 23 based name) in order to ease flash device identification and/or 26 '#address-cells': [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | fsl-ls1088a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /dts-v1/; 13 #include "fsl-ls1088a.dtsi" 17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a"; 21 bus-num = <0>; 24 flash@0 { 25 #address-cells = <1>; 26 #size-cells = <1>; 27 compatible = "jedec,spi-nor"; 29 spi-max-frequency = <1000000>; [all …]
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H A D | fsl-ls1028a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /dts-v1/; 13 #include "fsl-ls1028a.dtsi" 17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a"; 32 stdout-path = "serial0:115200n8"; 40 sys_mclk: clock-mclk { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <25000000>; 46 reg_1p8v: regulator-1p8v { [all …]
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H A D | fsl-ls208xa-qds.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 14 phy-handle = <&mdio0_phy12>; 15 phy-connection-type = "sgmii"; 19 phy-handle = <&mdio0_phy13>; 20 phy-connection-type = "sgmii"; 24 phy-handle = <&mdio0_phy14>; 25 phy-connection-type = "sgmii"; 29 phy-handle = <&mdio0_phy15>; 30 phy-connection-type = "sgmii"; 34 mmc-hs200-1_8v; [all …]
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H A D | fsl-ls1012a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "fsl-ls1012a.dtsi" 14 compatible = "fsl,ls1012a-qds", "fsl,ls1012a"; 21 sys_mclk: clock-mclk { 22 compatible = "fixed-clock"; 23 #clock-cells = <0>; 24 clock-frequency = <24576000>; 27 reg_3p3v: regulator-3p3v { 28 compatible = "regulator-fixed"; [all …]
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H A D | fsl-ls1046a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-1046A family SoC. 6 * Copyright 2018-2019 NXP 11 /dts-v1/; 13 #include "fsl-ls1046a.dtsi" 17 compatible = "fsl,ls1046a-qds", "fsl,ls1046a"; 20 emi1-slot1 = &ls1046mdio_s1; 21 emi1-slot2 = &ls1046mdio_s2; 22 emi1-slot4 = &ls1046mdio_s4; 27 qsgmii-s2-p1 = &qsgmii_phy_s2_p1; [all …]
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H A D | fsl-ls2081a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /dts-v1/; 13 #include "fsl-ls2088a.dtsi" 17 compatible = "fsl,ls2081a-rdb", "fsl,ls2081a"; 25 stdout-path = "serial1:115200n8"; 32 n25q512a: flash@0 { 33 compatible = "jedec,spi-nor"; 34 #address-cells = <1>; 35 #size-cells = <1>; 36 spi-max-frequency = <3000000>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | amlogic,meson6-spifc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Amlogic Meson SPI Flash Controller 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 - $ref: spi-controller.yaml# 17 The Meson SPIFC is a controller optimized for communication with SPI 18 NOR memories, without DMA support and a 64-byte unified transmit / 24 - amlogic,meson6-spifc # SPI Flash Controller on Meson6 and compatible SoCs [all …]
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H A D | spi-mtk-nor.txt | 1 * Serial NOR flash controller for MediaTek ARM SoCs 4 - compatible: For mt8173, compatible should be "mediatek,mt8173-nor", 6 For every other SoC, should contain both the SoC-specific compatible 7 string and "mediatek,mt8173-nor". 9 "mediatek,mt2701-nor", "mediatek,mt8173-nor" 10 "mediatek,mt2712-nor", "mediatek,mt8173-nor" 11 "mediatek,mt7622-nor", "mediatek,mt8173-nor" 12 "mediatek,mt7623-nor", "mediatek,mt8173-nor" 13 "mediatek,mt7629-nor", "mediatek,mt8173-nor" 14 "mediatek,mt8173-nor" [all …]
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H A D | mediatek,spi-mtk-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Serial NOR flash controller for MediaTek ARM SoCs 10 - Bayi Cheng <bayi.cheng@mediatek.com> 11 - Chuanhong Guo <gch981213@gmail.com> 14 This spi controller support single, dual, or quad mode transfer for 15 SPI NOR flash. There should be only one spi slave device following 16 generic spi bindings. It's not recommended to use this controller [all …]
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H A D | mediatek,spi-mtk-snfi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SPI-NAND flash controller for MediaTek ARM SoCs 10 - Chuanhong Guo <gch981213@gmail.com> 13 The Mediatek SPI-NAND flash controller is an extended version of 14 the Mediatek NAND flash controller. It can perform standard SPI 15 instructions with one continuous write and one read for up-to 0xa0 16 bytes. It also supports typical SPI-NAND page cache operations [all …]
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H A D | aspeed,ast2600-fmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> 11 - Cédric Le Goater <clg@kaod.org> 15 SPI) of the AST2400, AST2500 and AST2600 SOCs. 18 - $ref: spi-controller.yaml# 23 - aspeed,ast2600-fmc 24 - aspeed,ast2600-spi [all …]
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H A D | brcm,spi-bcm-qspi.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/spi/brc [all...] |
H A D | hpe,gxp-spifi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/hpe,gxp-spifi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: HPE GXP spi controller flash interface 10 - Nick Hawkins <nick.hawkins@hpe.com> 11 - Jean-Marie Verdun <verdun@hpe.com> 14 - $ref: spi-controller.yaml# 18 const: hpe,gxp-spifi 22 - description: cfg registers [all …]
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H A D | cdns,xspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 # Copyright 2020-21 Cadence 4 --- 5 $id: http://devicetree.org/schemas/spi/cdns,xspi.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Parshuram Thombare <pthombar@cadence.com> 14 The XSPI controller allows SPI protocol communication in 16 read/write access to slaves such as SPI-NOR flash. 21 - cdns,xspi-nor 22 - marvell,cn10-xspi-nor [all …]
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H A D | rockchip-sfc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/rockchi [all...] |
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | renesas,rpc-if.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas Reduced Pin Count Interface (RPC-IF) 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to 16 The flash chip itself should be represented by a subnode of the RPC-IF node. 17 The flash interface is selected based on the "compatible" property of this 19 - if it contains "jedec,spi-nor", then SPI is used; [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | p1010rdb.dtsi | 2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges) 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 41 bank-width = <2>; 42 device-width = <1>; 64 /* 512KB for u-boot Bootloader Image */ 65 /* 512KB for u-boot Environment Variables */ 67 label = "NOR U-Boot Image"; 68 read-only; [all …]
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H A D | p1021rdb-pc.dtsi | 2 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges) 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 41 bank-width = <2>; 42 device-width = <1>; 48 label = "NOR Vitesse-7385 Firmware"; 49 read-only; 75 read-only; 80 /* 512KB for u-boot Bootloader Image */ [all …]
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/freebsd/share/man/man4/ |
H A D | at45d.4 | 30 .Nd driver for DataFlash(tm) non-volatile storage devices 35 .Bd -ragged -offset indent 42 .Bd -literal -offset indent 48 driver provides support for the family of non-volatile storage 53 driver supports only the SPI bus versions of each AT45DB device, 66 .Pa /dev/flash/at45d? . 75 .Bl -bullet -compact 101 of the SPI bus controller node. 107 The most commonly-used ones are documented below. 112 .Bl -tag -width indent [all …]
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