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/freebsd/share/man/man4/
H A Dspigen.431 .Nd SPI generic I/O device driver
36 .Bd -ragged -offset indent
37 .Cd "device spi"
38 .Cd "device spibus"
39 .Cd "device spigen"
45 .Bd -literal -offset indent
51 driver provides direct access to a slave device on the SPI bus.
54 device is associated with a single chip-select
56 with that chip-select line asserted.
58 SPI data transfers are inherently bi-directional; there are no separate
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H A Dmx25l.430 .Nd driver for SpiFlash(tm) compatible non-volatile storage devices
35 .Bd -ragged -offset indent
36 .Cd "device mx25l"
42 .Bd -literal -offset indent
48 driver provides support for the family of non-volatile storage
55 driver uses opcode 0x9f to read the manufacturer and device ID
56 data to determine whether the device is supported.
57 The device ID is looked up using a table of data within the driver
58 which describes the attributes of each supported device,
59 such as block size, sector size, and device capacity.
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H A Dat45d.430 .Nd driver for DataFlash(tm) non-volatile storage devices
35 .Bd -ragged -offset indent
36 .Cd "device at45d"
42 .Bd -literal -offset indent
48 driver provides support for the family of non-volatile storage
53 driver supports only the SPI bus versions of each AT45DB device,
58 driver uses opcode 0x9f to read the manufacturer and device ID
59 data to determine whether the device is supported.
60 The device ID is looked up using a table of data within the driver
61 which describes the attributes of each supported device,
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/freebsd/usr.sbin/spi/
H A Dspi.828 .Nm spi
29 .Nd communicate on SPI bus with slave devices
36 .Op Fl C Ar command-bytes
39 .Op Fl f Ar device
41 .Op Fl s Ar max-speed
45 .Op Fl f Ar device
53 with devices on the SPI bus, via the
55 device.
59 device is associated with a specific
63 If no device name is specified on the command line,
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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Common Properties
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
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H A Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
27 - minimum: 0
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H A Dqcom,spi-qup.txt1 Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
4 and an input FIFO) for serial peripheral interface (SPI) mini-core.
6 SPI in master mode supports up to 50MHz, up to four chip selects, programmable
10 - compatible: Should contain:
11 "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
12 "qcom,spi-qup-v2.1.1" for 8974 and later
13 "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
15 - reg: Should contain base register location and length
16 - interrupts: Interrupt number used by this controller
18 - clocks: Should contain the core clock and the AHB clock.
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H A Dspi-orion.txt1 Marvell Orion SPI device
4 - compatible : should be on of the following:
5 - "marvell,orion-spi" for the Orion, mv78x00, Kirkwood and Dove SoCs
6 - "marvell,armada-370-spi", for the Armada 370 SoCs
7 - "marvell,armada-375-spi", for the Armada 375 SoCs
8 - "marvell,armada-380-spi", for the Armada 38x SoCs
9 - "marvell,armada-390-spi", for the Armada 39x SoCs
10 - "marvell,armada-xp-spi", for the Armada XP SoCs
11 - reg : offset and length of the register set for the device.
13 the SPI direct access mode that some of the Marvell SoCs support
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H A Dspi-davinci.txt1 Davinci SPI controller device bindings
4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
10 address on the SPI bus. Should be set to 1.
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
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H A Dfsl-spi.txt1 * SPI (Serial Peripheral Interface)
4 - cell-index : QE SPI subblock index.
7 - compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
8 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
9 - reg : Offset and length of the register set for the device
10 - interrupts : <a b> where a is the interrupt number and b is a
15 - clock-frequency : input clock frequency to non FSL_SOC cores
18 - cs-gpios : specifies the gpio pins to be used for chipselects.
19 The gpios will be referred to as reg = <index> in the SPI child nodes.
20 If unspecified, a single SPI device without a chip select can be used.
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H A Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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H A Dnvidia,tegra114-spi.txt1 NVIDIA Tegra114 SPI controller.
4 - compatible : For Tegra114, must contain "nvidia,tegra114-spi".
5 Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
7 - reg: Should contain SPI registers location and length.
8 - interrupts: Should contain SPI interrupts.
9 - clock-names : Must include the following entries:
10 - spi
11 - resets : Must contain an entry for each entry in reset-names.
13 - reset-names : Must include the following entries:
14 - spi
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/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dst-fsm.txt1 * ST-Microelectronics SPI FSM Serial (NOR) Flash Controller
4 - compatible : Should be "st,spi-fsm"
5 - reg : Contains register's location and length.
6 - reg-names : Should contain the reg names "spi-fsm"
7 - interrupts : The interrupt number
8 - pinctrl-0 : Standard Pinctrl phandle (see: pinctrl/pinctrl-bindings.txt)
11 - st,syscfg : Phandle to boot-device system configuration registers
12 - st,boot-device-reg : Address of the aforementioned boot-device register(s)
13 - st,boot-device-spi : Expected boot-device value if booted via this device
17 compatible = "st,spi-fsm";
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/freebsd/sys/contrib/device-tree/Bindings/input/rmi4/
H A Drmi_spi.txt1 Synaptics RMI4 SPI Device Binding
4 transports and different functions. This file describes the device tree
5 bindings for devices using the SPI transport driver. Complete documentation
10 - compatible: syna,rmi4-spi
11 - reg: Chip select address for the device
12 - #address-cells: Set to 1 to indicate that the function child nodes
14 - #size-cells: Set to 0 to indicate that the function child nodes do not
18 - interrupts: interrupt which the rmi device is connected to.
19 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21 - spi-rx-delay-us: microsecond delay after a read transfer.
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/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dmaxim-ds1302.txt1 * Maxim/Dallas Semiconductor DS-1302 RTC
3 Simple device which could be used to store date/time between reboots.
5 The device uses the standard MicroWire half-duplex transfer timing.
12 - compatible : Should be "maxim,ds1302"
14 Required SPI properties:
16 - reg : Should be address of the device chip select within
19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
22 - spi-3wire : The device has a shared signal IN/OUT line.
24 - spi-lsb-first : DS-1302 requires least significant bit first
27 - spi-cs-high: DS-1302 has active high chip select line. This is
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/freebsd/sys/cam/scsi/
H A Dscsi_xpt.c1 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
75 #define SCSI_QUIRK(dev) ((struct scsi_quirk_entry *)((dev)->quirk))
83 ((((x)->luns[i].lundata[0] & RPL_LUNDATA_ATYP_MASK) == \
85 (((x)->luns[i].lundata[0] & RPL_LUNDATA_ATYP_MASK) == \
88 if (((lp)->luns[(i)].lundata[0] & RPL_LUNDATA_ATYP_MASK) == \
90 (lval) = (lp)->luns[(i)].lundata[1]; \
92 (lval) = (lp)->luns[(i)].lundata[0]; \
95 (lval) |= (lp)->luns[(i)].lundata[1]; \
98 (lval) = scsi_8btou64((lp)->luns[(i)].lundata); \
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/freebsd/sys/contrib/device-tree/Bindings/misc/
H A Dge-achc.txt3 A device which handles data aquisition from compatible USB based peripherals.
4 SPI is used for device management.
6 Note: This device does not expose the peripherals as USB devices.
10 - compatible : Should be "ge,achc"
12 Required SPI properties:
14 - reg : Should be address of the device chip select within
17 - spi-max-frequency : Maximum SPI clocking speed of device in Hz, should be
22 spidev0: spi@0 {
25 spi-max-frequency = <1000000>;
H A Dlwn-bk4.txt1 * Liebherr's BK4 controller external SPI
3 A device which handles data acquisition from compatible industrial
5 The SPI is used for data and management purposes in both master and
10 - compatible : Should be "lwn,bk4"
12 Required SPI properties:
14 - reg : Should be address of the device chip select within
17 - spi-max-frequency : Maximum SPI clocking speed of device in Hz, should be
22 spidev0: spi@0 {
24 spi-max-frequency = <30000000>;
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dvitesse,vsc73xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Vitesse DSA Switches were produced in the early-to-mid 2000s.
19 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
20 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
21 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
22 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
26 If SPI interface is used, the device tree node is an SPI device so it must
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dvertexcom-mse102x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/vertexcom-mse102x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The Vertexcom MSE102x (SPI)
10 - Stefan Wahren <stefan.wahren@chargebyte.com>
14 They can be connected either via RGMII, RMII or SPI to a host CPU.
16 In order to use a MSE102x chip as SPI device, it must be defined as
17 a child of an SPI master device in the device tree.
23 - $ref: ethernet-controller.yaml#
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H A Dqca,qca7000.txt3 The QCA7000 is a serial-to-powerline bridge with a host interface which could
4 be configured either as SPI or UART slave. This configuration is done by
7 (a) Ethernet over SPI
9 In order to use the QCA7000 as SPI device it must be defined as a child of a
10 SPI master in the device tree.
13 - compatible : Should be "qca,qca7000"
14 - reg : Should specify the SPI chip select
15 - interrupts : The first cell should specify the index of the source
18 - spi-cpha : Must be set
19 - spi-cpol : Must be set
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/freebsd/sys/contrib/device-tree/Bindings/iio/proximity/
H A Das3935.txt1 Austrian Microsystems AS3935 Franklin lightning sensor device driver
4 - compatible: must be "ams,as3935"
5 - reg: SPI chip select number for the device
6 - spi-max-frequency: specifies maximum SPI clock frequency
7 - spi-cpha: SPI Mode 1. Refer to spi/spi-bus.txt for generic SPI
9 - interrupts : the sole interrupt generated by the device
11 Refer to interrupt-controller/interrupts.txt for generic
15 - ams,tuning-capacitor-pf: Calibration tuning capacitor stepping
16 value 0 - 120pF. This will require using the calibration data from
18 - ams,nflwdth: Set the noise and watchdog threshold register on
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/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-spi-byte.txt1 * Single Byte SPI LED Device Driver.
3 The driver can be used for controllers with a very simple SPI protocol:
4 - one LED is controlled by a single byte on MOSI
5 - the value of the byte gives the brightness between two values (lowest to
7 - no return value is necessary (no MISO signal)
9 The value for lowest and highest brightness is dependent on the device and
16 configured in a sub-node in the device node.
19 - compatible: should be one of
20 * "ubnt,acb-spi-led" microcontroller (SONiX 8F26E611LA) based device
23 Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dgoogle,cros-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benson Leung <bleung@chromium.org>
11 - Guenter Roeck <groeck@chromium.org>
16 The EC can be connected through various interfaces (I2C, SPI, and others)
22 - description:
24 const: google,cros-ec-i2c
25 - description:
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H A Datmel-flexcom.txt1 * Device tree bindings for Atmel Flexcom (Flexible Serial Communication Unit)
3 The Atmel Flexcom is just a wrapper which embeds a SPI controller, an I2C
5 at boot time according to the device tree.
8 - compatible: Should be "atmel,sama5d2-flexcom"
9 or "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom"
10 - reg: Should be the offset/length value for Flexcom dedicated
11 I/O registers (without USART, TWI or SPI registers).
12 - clock
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