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Searched +full:spear320 +full:- +full:shirq (Results 1 – 4 of 4) sorted by relevance

/linux/arch/arm/boot/dts/st/
H A Dspear320.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DTS file for SPEAr320 SoC
12 #address-cells = <1>;
13 #size-cells = <1>;
14 compatible = "simple-bus";
19 compatible = "st,spear320-pinmux";
21 #gpio-range-cells = <3>;
28 interrupt-parent = <&shirq>;
33 compatible = "st,spear600-fsmc-nand";
34 #address-cells = <1>;
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H A Dspear320s.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "spear320.dtsi"
20 interrupt-parent = <&shirq>;
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dst,spear300-shirq.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/st,spear300-shirq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Shiraz Hashim <shiraz.linux.kernel@gmail.com>
26 shares config/control registers with other groups. For example, a 32-bit
33 - st,spear300-shirq
34 - st,spear310-shirq
35 - st,spear320-shirq
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/linux/drivers/irqchip/
H A Dspear-shirq.c4 * Copyright (C) 2009-2012 ST Microelectronics
60 struct spear_shirq *shirq = irq_data_get_irq_chip_data(d); in shirq_irq_mask() local
61 u32 val, shift = d->irq - shirq->virq_base + shirq->offset; in shirq_irq_mask()
62 u32 __iomem *reg = shirq->base + shirq->mask_reg; in shirq_irq_mask()
72 struct spear_shirq *shirq = irq_data_get_irq_chip_data(d); in shirq_irq_unmask() local
73 u32 val, shift = d->irq - shirq->virq_base + shirq->offset; in shirq_irq_unmask()
74 u32 __iomem *reg = shirq->base + shirq->mask_reg; in shirq_irq_unmask()
83 .name = "spear-shirq",
91 .mask = ((0x1 << 9) - 1) << 0,
107 .mask = ((0x1 << 8) - 1) << 0,
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