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Searched +full:spear320 +full:- +full:shirq (Results 1 – 4 of 4) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dst,spear3xx-shirq.txt1 * SPEAr Shared IRQ layer (shirq)
16 For example, a 32-bit interrupt enable/disable config register can
20 - compatible: should be, either of
21 - "st,spear300-shirq"
22 - "st,spear310-shirq"
23 - "st,spear320-shirq"
24 - interrupt-controller: Identifies the node as an interrupt controller.
25 - #interrupt-cells: should be <1> which basically contains the offset
27 - reg: Base address and size of shirq registers.
28 - interrupts: The list of interrupts generated by the groups which are
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H A Dst,spear300-shirq.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/st,spear300-shirq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Shiraz Hashim <shiraz.linux.kernel@gmail.com>
26 shares config/control registers with other groups. For example, a 32-bit
33 - st,spear300-shirq
34 - st,spear310-shirq
35 - st,spear320-shirq
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dspear320.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DTS file for SPEAr320 SoC
12 #address-cells = <1>;
13 #size-cells = <1>;
14 compatible = "simple-bus";
19 compatible = "st,spear320-pinmux";
21 #gpio-range-cells = <3>;
28 interrupt-parent = <&shirq>;
33 compatible = "st,spear600-fsmc-nand";
34 #address-cells = <1>;
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H A Dspear320s.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "spear320.dtsi"
20 interrupt-parent = <&shirq>;