Searched full:spdif_sel (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/clk/imx/ |
| H A D | clk-imx35.c | 66 /* 15 */ esdhc_sel, esdhc1_div, esdhc2_div, esdhc3_div, spdif_sel, enumerator
146 …clk[spdif_sel] = imx_clk_mux("spdif_sel", base + MX35_CCM_PDR3, 22, 1, std_sel, ARRAY_SIZE(std_sel… in _mx35_clocks_init()
147 …clk[spdif_div_pre] = imx_clk_divider("spdif_div_pre", "spdif_sel", base + MX35_CCM_PDR3, 29, 3); /… in _mx35_clocks_init()
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| H A D | clk-imx5.c | 121 static const char *spdif_sel[] = { "pll1_sw", "pll2_sw", "pll3_sw", "spdif_xtal_sel", }; variable
263 …LK_SPDIF0_SEL] = imx_clk_mux("spdif0_sel", MXC_CCM_CSCMR2, 0, 2, spdif_sel, ARRAY_SIZE(spdif_sel)); in mx5_clocks_common_init()
424 spdif_sel, ARRAY_SIZE(spdif_sel)); in mx51_clocks_init()
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| H A D | clk-imx6sll.c | 210 …hws[IMX6SLL_CLK_SPDIF_SEL] = imx_clk_hw_mux("spdif_sel", base + 0x30, 20, 2, spdif_sels, ARRAY_S… in imx6sll_clocks_init()
236 …hws[IMX6SLL_CLK_SPDIF_PRED] = imx_clk_hw_divider("spdif_pred", "spdif_sel", base + 0x30, 25, 3… in imx6sll_clocks_init()
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| H A D | clk-imx7d.c | 139 static const char *spdif_sel[] = { "osc", "pll_sys_pfd2_135m_clk", variable
515 …] = imx_clk_hw_mux2_flags("spdif_src", base + 0xa680, 24, 3, spdif_sel, ARRAY_SIZE(spdif_sel), CLK… in imx7d_clocks_init()
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| H A D | clk-imx6ul.c | 276 …hws[IMX6UL_CLK_SPDIF_SEL] = imx_clk_hw_mux("spdif_sel", base + 0x30, 20, 2, spdif_sels, ARRAY_SI… in imx6ul_clocks_init()
329 hws[IMX6UL_CLK_SPDIF_PRED] = imx_clk_hw_divider("spdif_pred", "spdif_sel", base + 0x30, 25, 3); in imx6ul_clocks_init()
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| H A D | clk-imx6sx.c | 291 …hws[IMX6SX_CLK_SPDIF_SEL] = imx_clk_hw_mux("spdif_sel", base + 0x30, 20, 2, … in imx6sx_clocks_init()
341 …hws[IMX6SX_CLK_SPDIF_PRED] = imx_clk_hw_divider("spdif_pred", "spdif_sel", bas… in imx6sx_clocks_init()
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| H A D | clk-imx6q.c | 620 …hws[IMX6QDL_CLK_SPDIF_SEL] = imx_clk_hw_mux("spdif_sel", base + 0x30, 20, 2, audio_s… in imx6q_clocks_init()
721 …hws[IMX6QDL_CLK_SPDIF_PRED] = imx_clk_hw_divider("spdif_pred", "spdif_sel", ba… in imx6q_clocks_init()
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| H A D | clk-imx8ulp.c | 303 …clks[IMX8ULP_CLK_SPDIF_SEL] = imx_clk_hw_mux2("spdif_sel", base + 0x910, 0, 3, sai67_sels, ARRAY_S… in imx8ulp_clk_cgc2_init()
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | imx35-clock.yaml | 38 spdif_sel 19
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