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/linux/arch/arm/boot/dts/sunplus/
H A Dsunplus-sp7021.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for Sunplus SP7021
8 #include <dt-bindings/clock/sunplus,sp7021-clkc.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/sunplus,sp7021-reset.h>
11 #include <dt-bindings/pinctrl/sppctl-sp7021.h>
12 #include <dt-bindings/gpio/gpio.h>
17 compatible = "sunplus,sp7021";
18 model = "Sunplus SP7021";
22 compatible = "fixed-clock";
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/linux/Documentation/devicetree/bindings/serial/
H A Dsunplus,sp7021-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/sunplus,sp7021-uart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Sunplus SoC SP7021 UART Controller
11 - Hammer Hsieh <hammerh0314@gmail.com>
14 - $ref: serial.yaml#
18 const: sunplus,sp7021-uart
33 - compatible
34 - reg
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsunplus,sp7021-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Sunplus SP7021 Pin Controller
11 - Dvorkin Dmitry <dvorkin@tibbo.com>
12 - Wells Lu <wellslutw@gmail.com>
15 The Sunplus SP7021 pin controller is used to control SoC pins. Please
16 refer to pinctrl-bindings.txt in this directory for details of the common
19 SP7021 has 99 digital GPIO pins which are numbered from GPIO 0 to 98. All
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/linux/drivers/tty/serial/
H A Dsunplus-uart.c1 // SPDX-License-Identifier: GPL-2.0
3 * Sunplus SoC UART driver
7 * Note1: This driver is 8250-like uart, but are not register compatible.
82 writel(ch, port->membase + SUP_UART_DATA); in sp_uart_put_char()
87 unsigned int lsr = readl(port->membase + SUP_UART_LSR); in sunplus_tx_buf_not_full()
94 unsigned int lsr = readl(port->membase + SUP_UART_LSR); in sunplus_tx_empty()
101 unsigned int mcr = readl(port->membase + SUP_UART_MCR); in sunplus_set_mctrl()
128 writel(mcr, port->membase + SUP_UART_MCR); in sunplus_set_mctrl()
135 mcr = readl(port->membase + SUP_UART_MCR); in sunplus_get_mctrl()
159 isc = readl(port->membase + SUP_UART_ISC); in sunplus_stop_tx()
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