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/linux/Documentation/devicetree/bindings/soundwire/
H A Dqcom,soundwire.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soundwire/qcom,soundwire.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SoundWire Controller
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
14 The Qualcomm SoundWire controller along with its board specific bus parameters.
19 - qcom,soundwire-v1.3.0
20 - qcom,soundwire-v1.5.0
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H A Dsoundwire-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soundwire/soundwire-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SoundWire Controller Common Properties
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Vinod Koul <vkoul@kernel.org>
14 SoundWire busses can be described with a node for the SoundWire controller
15 device and a set of child nodes for each SoundWire slave on the bus.
19 pattern: "^soundwire(@.*)?$"
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/linux/include/linux/soundwire/
H A Dsdw_amd.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
3 * Copyright (C) 2023-24 Advanced Micro Devices, Inc. All rights reserved.
10 #include <linux/soundwire/sdw.h>
22 * is invoked. If set, a complete bus reset and re-enumeration will
23 * be performed when the bus restarts. In-band wake interrupts are
40 * @name: SoundWire stream name
53 * struct amd_sdw_manager - amd manager driver context
56 * @mmio: SoundWire registers mmio base
58 * @amd_sdw_irq_thread: SoundWire manager irq workqueue
66 * @instance: SoundWire manager instance
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H A Dsdw_intel.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
8 #include <linux/soundwire/sdw.h>
42 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
43 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24_576 (24576 / SDW_CADENCE_GSYNC_KHZ - 1)
44 #define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
45 #define SDW_SHIM_SYNC_SYNCPRD_VAL_96 (96000 / SDW_CADENCE_GSYNC_KHZ - 1)
116 * ACE2.x definitions for SHIM registers - only accessible when the
125 /* Read-only capabilities */
127 #define SDW_SHIM2_LECAP_HDS BIT(0) /* unset -> Host mode */
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H A Dsdw.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
36 * Note: The maximum row define in SoundWire spec 1.1 is 23. In order to
75 * enum sdw_slave_status - Slave status
93 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
94 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
104 * enum sdw_command_response - Command response as defined by SDW spec
190 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
201 * enum sdw_dpn_type - Data port types
216 * enum sdw_clk_stop_mode - Clock Stop modes
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/linux/sound/soc/amd/ps/
H A Dacp63.h1 /* SPDX-License-Identifier: GPL-2.0+ */
8 #include <linux/soundwire/sdw_amd.h>
94 #define SDW0_DMA_TX_IRQ_MASK(i) (ACP_AUDIO0_TX_THRESHOLD - (2 * (i)))
95 #define SDW0_DMA_RX_IRQ_MASK(i) (ACP_AUDIO0_RX_THRESHOLD - (2 * ((i) - 3)))
104 #define SDW1_DMA_IRQ_MASK(i) (ACP_P1_AUDIO_TX_THRESHOLD - (i))
216 * struct acp63_dev_data - acp pci driver context
219 * @pdm_dev: ACP PDM controller platform device
221 * sdw_dma_dev: platform device for SoundWire DMA controller
222 * @mach_dev: platform device for machine driver to support ACP PDM/SoundWire configuration
224 * @info: SoundWire AMD information found in ACPI tables
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H A Dpci-ps.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/soundwire/sdw_amd.h>
20 #include "../mach-config.h"
109 sdw_dma_data = dev_get_drvdata(&adata->sdw_dma_dev->dev); in acp63_irq_thread()
112 if (adata->sdw0_dma_intr_stat[stream_index]) { in acp63_irq_thread()
113 if (sdw_dma_data->sdw0_dma_stream[stream_index]) in acp63_irq_thread()
114 snd_pcm_period_elapsed(sdw_dma_data->sdw0_dma_stream[stream_index]); in acp63_irq_thread()
115 adata->sdw0_dma_intr_stat[stream_index] = 0; in acp63_irq_thread()
119 if (adata->sdw1_dma_intr_stat[stream_index]) { in acp63_irq_thread()
120 if (sdw_dma_data->sdw1_dma_stream[stream_index]) in acp63_irq_thread()
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/linux/sound/hda/
H A Dintel-sdw-acpi.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-2021 Intel Corporation.
16 #include <linux/soundwire/sdw_intel.h>
27 MODULE_PARM_DESC(sdw_ctrl_addr, "Intel SoundWire Controller _ADR");
37 "mipi-sdw-link-%hhu-subproperties", idx); in is_link_enabled()
44 "intel-quirk-mask", in is_link_enabled()
58 struct acpi_device *adev = acpi_fetch_acpi_dev(info->handle); in sdw_intel_scan_controller()
67 return -EINVAL; in sdw_intel_scan_controller()
72 * Found controller, find links supported in sdw_intel_scan_controller()
75 * hardware, but in that step we cannot assume SoundWire IP is in sdw_intel_scan_controller()
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/linux/Documentation/driver-api/soundwire/
H A Dsummary.rst2 SoundWire Subsystem Summary
5 SoundWire is a new interface ratified in 2015 by the MIPI Alliance.
6 SoundWire is used for transporting data typically related to audio
7 functions. SoundWire interface is optimized to integrate audio devices in
10 SoundWire is a 2-pin multi-drop interface with data and clock line. It
12 Broad level key features of SoundWire interface include:
15 commands over a single two-pin interface.
23 (4) Device status monitoring, including interrupt-style alerts to the Master.
25 The SoundWire protocol supports up to eleven Slave interfaces. All the
35 Below figure shows an example of connectivity between a SoundWire Master and
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/linux/sound/soc/amd/acp/
H A DKconfig1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
13 This option enables common modules for Audio-Coprocessor i.e. ACP
123 tristate "AMD SOF Soundwire Machine Driver Support"
125 depends on SOUNDWIRE
134 This option enables SOF sound card support for SoundWire enabled
135 AMD platforms along with ACP PDM controller.
136 Say Y if you want to enable SoundWire based machine driver support
146 This options enables ACPI helper functions for SoundWire
H A Damd-sdw-acpi.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
22 #include <linux/soundwire/sdw_amd.h>
27 struct acpi_device *adev = acpi_fetch_acpi_dev(info->handle); in amd_sdw_scan_controller()
33 return -EINVAL; in amd_sdw_scan_controller()
35 /* Found controller, find links supported */ in amd_sdw_scan_controller()
37 "mipi-sdw-manager-list", &sdw_bitmap, 1); in amd_sdw_scan_controller()
39 dev_err(&adev->dev, in amd_sdw_scan_controller()
40 "Failed to read mipi-sdw-manager-list: %d\n", ret); in amd_sdw_scan_controller()
41 return -EINVAL; in amd_sdw_scan_controller()
45 if (count > info->count) { in amd_sdw_scan_controller()
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/linux/sound/soc/amd/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
39 tristate "AMD Audio Coprocessor-v3.x support"
58 tristate "AMD Audio Coprocessor - Renoir support"
72 tristate "AMD Audio Coprocessor-v5.x I2S support"
95 tristate "AMD Audio Coprocessor-v6.x Yellow Carp support"
111 using dmic. ACP IP has PDM Decoder block with DMA controller.
126 tristate "AMD Audio Coprocessor-v6.2 RPL support"
153 tristate "Support for SoundWire based AMD platforms"
159 This adds support for SoundWire for AMD platforms.
160 Say Y if you want to enable SoundWire links with SOF.
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/linux/sound/soc/sof/intel/
H A Dhda.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
24 #include <linux/soundwire/sdw.h>
25 #include <linux/soundwire/sdw_intel.h>
26 #include <sound/intel-dsp-config.h>
27 #include <sound/intel-nhlt.h>
28 #include <sound/soc-acpi-intel-ssp-common.h>
31 #include <sound/hda-mlink.h>
32 #include "../sof-audio.h"
33 #include "../sof-pci-dev.h"
35 #include "../ipc4-topology.h"
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/linux/arch/arm64/boot/dts/qcom/
H A Dsdm845-wcd9340.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #address-cells = <2>;
14 #size-cells = <0>;
24 slim-ifc-dev = <&wcd9340_ifd>;
26 #sound-dai-cells = <1>;
28 interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
29 interrupt-controller;
30 #interrupt-cells = <1>;
32 clock-names = "extclk";
35 #clock-cells = <0>;
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/linux/drivers/soundwire/
H A Dintel_auxdevice.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-22 Intel Corporation.
5 * Soundwire Intel Manager Driver
18 #include <linux/soundwire/sdw_registers.h>
19 #include <linux/soundwire/sdw.h>
20 #include <linux/soundwire/sdw_intel.h>
29 * debug/config flags for the Intel SoundWire Master.
32 * flags reused in each byte, with master0 using the ls-byte, etc.
42 MODULE_PARM_DESC(sdw_md_flags, "SoundWire Intel Master device flags (0x0 all off)");
72 if (slave->id.part_id == wake_capable_list[i].part_id && in is_wake_capable()
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H A Damd_manager.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
3 * Copyright (C) 2023-24 Advanced Micro Devices, Inc. All rights reserved.
9 #include <linux/soundwire/sdw_amd.h>
210 * Below is the CPU DAI <->Manager port number mapping
211 * i.e SDW0 Pin0 -> port number 0 -> AUDIO0 TX
212 * SDW0 Pin1 -> Port number 1 -> AUDIO1 TX
213 * SDW0 Pin2 -> Port number 2 -> AUDIO2 TX
214 * SDW0 Pin3 -> port number 3 -> AUDIO0 RX
215 * SDW0 Pin4 -> Port number 4 -> AUDIO1 RX
216 * SDW0 Pin5 -> Port number 5 -> AUDIO2 RX
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H A Dstream.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-18 Intel Corporation.
5 * stream.c - SoundWire Bus stream operations.
14 #include <linux/soundwire/sdw_registers.h>
15 #include <linux/soundwire/sdw.h>
16 #include <linux/soundwire/sdw_type.h>
21 * Array of supported rows and columns as per MIPI SoundWire Specification 1.1
71 if (bus->params.next_bank) { in _sdw_program_slave_port_params()
72 addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num); in _sdw_program_slave_port_params()
73 addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num); in _sdw_program_slave_port_params()
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H A Dintel.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
10 * struct sdw_intel_link_res - Soundwire Intel link resource structure,
11 * typically populated by the controller driver.
12 * @hw_ops: platform-specific ops
13 * @mmio_base: mmio base of SoundWire registers
17 * @shim_vs: Audio vendor-specific shim pointer
25 * @link_mask: global mask needed for power-up/down sequences
27 * @list: used to walk-through all masters exposed by the same controller
108 #define SDW_INTEL_CHECK_OPS(sdw, cb) ((sdw) && (sdw)->link_res && (sdw)->link_res->hw_ops && \
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H A Dqcom.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/soundwire/sdw.h>
20 #include <linux/soundwire/sdw_registers.h>
102 #define SWRM_DP_PORT_CTRL_BANK(n, m) (0x1124 + 0x100 * (n - 1) + 0x40 * m)
103 #define SWRM_DP_PORT_CTRL_2_BANK(n, m) (0x1128 + 0x100 * (n - 1) + 0x40 * m)
104 #define SWRM_DP_BLOCK_CTRL_1(n) (0x112C + 0x100 * (n - 1))
105 #define SWRM_DP_BLOCK_CTRL2_BANK(n, m) (0x1130 + 0x100 * (n - 1) + 0x40 * m)
106 #define SWRM_DP_PORT_HCTRL_BANK(n, m) (0x1134 + 0x100 * (n - 1) + 0x40 * m)
107 #define SWRM_DP_BLOCK_CTRL3_BANK(n, m) (0x1138 + 0x100 * (n - 1) + 0x40 * m)
108 #define SWRM_DP_SAMPLECTRL2_BANK(n, m) (0x113C + 0x100 * (n - 1) + 0x40 * m)
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H A Damd_manager.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * SoundWire AMD Manager driver
5 * Copyright 2023-24 Advanced Micro Devices, Inc.
16 #include <linux/soundwire/sdw.h>
17 #include <linux/soundwire/sdw_registers.h>
35 writel(AMD_SDW_ENABLE, amd_manager->mmio + ACP_SW_EN); in amd_init_sdw_manager()
36 ret = readl_poll_timeout(amd_manager->mmio + ACP_SW_EN_STATUS, val, val, ACP_DELAY_US, in amd_init_sdw_manager()
41 /* SoundWire manager bus reset */ in amd_init_sdw_manager()
42 writel(AMD_SDW_BUS_RESET_REQ, amd_manager->mmio + ACP_SW_BUS_RESET_CTRL); in amd_init_sdw_manager()
43 ret = readl_poll_timeout(amd_manager->mmio + ACP_SW_BUS_RESET_CTRL, val, in amd_init_sdw_manager()
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/linux/sound/soc/codecs/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
5 # setting - SPI can't be modular so that case doesn't need to be covered.
483 tristate "Analog Devices AU1761 CODEC - I2C"
489 tristate "Analog Devices AU1761 CODEC - SPI"
526 tristate "Analog Devices ADAU7002 Stereo PDM-to-I2S/TDM Converter"
532 tristate "Analog Devices ADAU7118 8 Channel PDM-to-I2S/TDM Converter - HW Mode"
535 Enable support for the Analog Devices ADAU7118 8 Channel PDM-to-I2S/TDM
541 will be called snd-soc-adau7118-hw.
544 tristate "Analog Devices ADAU7118 8 Channel PDM-to-I2S/TDM Converter - I2C"
549 Enable support for the Analog Devices ADAU7118 8 Channel PDM-to-I2S/TDM
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H A Dcs42l42-sdw.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // cs42l42-sdw.c -- CS42L42 ALSA SoC audio driver SoundWire driver
15 #include <linux/soundwire/sdw.h>
16 #include <linux/soundwire/sdw_registers.h>
17 #include <linux/soundwire/sdw_type.h>
28 /* Register addresses are offset when sent over SoundWire */
55 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(dai->component); in cs42l42_sdw_dai_startup()
57 if (!cs42l42->init_done) in cs42l42_sdw_dai_startup()
58 return -ENODEV; in cs42l42_sdw_dai_startup()
67 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(dai->component); in cs42l42_sdw_dai_hw_params()
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/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,wcd9335.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC with in-built
14 Soundwire controller and interrupt mux. It supports both I2S/I2C and SLIMbus
27 clock-names:
29 - const: mclk
30 - const: slimbus
35 interrupt-names:
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H A Dqcom,wcd934x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9340/WCD9341 Codec is a standalone Hi-Fi audio codec IC.
14 It has in-built Soundwire controller, pin controller, interrupt mux and
27 reset-gpios:
31 slim-ifc-dev:
38 clock-names:
41 vdd-buck-supply:
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/linux/sound/soc/intel/boards/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 has an audio controller with a DSP and I2S or DMIC port, then
109 tristate "Baytrail and Baytrail-CR with RT5640 codec"
116 This adds support for ASoC machine driver for Intel(R) Baytrail and Baytrail-CR
122 tristate "Baytrail and Baytrail-CR with RT5651 codec"
129 This adds support for ASoC machine driver for Intel(R) Baytrail and Baytrail-CR
135 tristate "Baytrail and Baytrail-CR with WM5102 codec"
142 This adds support for ASoC machine driver for Intel(R) Baytrail and Baytrail-CR
246 Up boards and provides access to I2S signals on the Low-Speed
506 tristate "SoundWire generic machine driver"
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