| /freebsd/sys/contrib/device-tree/Bindings/nvmem/ |
| H A D | snvs-lpgpr.yaml | 4 $id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml#
17 - fsl,imx8mm-snvs-lpgpr
18 - fsl,imx8mn-snvs-lpgpr
19 - fsl,imx8mp-snvs-lpgpr
20 - fsl,imx8mq-snvs-lpgpr
21 - const: fsl,imx7d-snvs-lpgpr
23 - fsl,imx6q-snvs-lpgpr
24 - fsl,imx6ul-snvs-lpgpr
25 - fsl,imx7d-snvs-lpgpr
34 snvs@20cc000 {
[all …]
|
| H A D | snvs-lpgpr.txt | 9 "fsl,imx6q-snvs-lpgpr" for Freescale i.MX6Q/D/DL/S
10 "fsl,imx6ul-snvs-lpgpr" for Freescale i.MX6UL
11 "fsl,imx7d-snvs-lpgpr" for Freescale i.MX7D/S
14 snvs: snvs@020cc000 {
18 snvs_lpgpr: snvs-lpgpr {
19 compatible = "fsl,imx6q-snvs-lpgpr";
|
| /freebsd/sys/contrib/device-tree/Bindings/crypto/ |
| H A D | fsl,sec-v4.0-mon.yaml | 8 title: Freescale Secure Non-Volatile Storage (SNVS)
16 Node defines address range and the associated interrupt for the SNVS function.
43 snvs-rtc-lp:
47 Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
57 const: snvs-rtc
78 snvs-powerkey:
82 The snvs-pwrkey is designed to enable POWER key function which controlled
83 by SNVS ONOFF, the driver can report the status of POWER key and wakeup
94 const: snvs-pwrkey
119 snvs-lpgpr:
[all …]
|
| H A D | fsl-sec4.txt | 11 -Secure Non-Volatile Storage (SNVS) Node
12 -Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
89 range of the SEC 4.0 register space (-SNVS not included). A
213 triggered (see SNVS definition).
246 range of the SEC 4 register space (-SNVS not included). A
309 Secure Non-Volatile Storage (SNVS) Node
312 interrupt for the SNVS function. This function
347 range of the SNVS register space. A triplet that includes
369 Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
371 A SNVS child node that defines SNVS LP RTC.
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | rohm,bd71847-pmic.yaml | 45 # states. States are called as SNVS and READY. At READY state all the PMIC
46 # power outputs go down and OTP is reload. At the SNVS state all other logic
47 # and external devices apart from the SNVS power domain are shut off. Please
48 # refer to NXP i.MX8 documentation for further information regarding SNVS
49 # state. When a reset is done via SNVS state the PMIC OTP data is not reload.
51 # reset has switched power state to SNVS. If reset is done via READY state the
53 # target state is set to READY by default. If SNVS state is used the boot
57 rohm,reset-snvs-powered:
59 Transfer PMIC to SNVS state at reset.
144 rohm,reset-snvs
[all...] |
| H A D | rohm,bd71837-pmic.yaml | 45 # are called as SNVS and READY. At READY state all the PMIC power outputs go
46 # down and OTP is reload. At the SNVS state all other logic and external
47 # devices apart from the SNVS power domain are shut off. Please refer to NXP
48 # i.MX8 documentation for further information regarding SNVS state. When a
49 # reset is done via SNVS state the PMIC OTP data is not reload. This causes
51 # switched power state to SNVS. If reset is done via READY state the power
53 # target state is set to READY by default. If SNVS state is used the boot
57 rohm,reset-snvs-powered:
59 Transfer PMIC to SNVS state at reset
141 rohm,reset-snvs-powered;
|
| /freebsd/sys/contrib/device-tree/Bindings/regulator/ |
| H A D | rohm,bd71815-regulator.yaml | 63 rohm,dvs-snvs-voltage:
65 Whether to keep regulator enabled at "SNVS" state or not.
66 0 means regulator should be disabled at SNVS state, non zero voltage
68 when PMIC transitions to SNVS.SNVS voltage depends on the previous
69 state (from which the PMIC transitioned to SNVS).
106 # for each of the HW states (RUN/SNVS/SUSPEND/LPSR). HW defaults can
|
| /freebsd/share/man/man4/man4.arm/ |
| H A D | imx6_snvs.4 | 54 .Sq SNVS
59 Other features of the SNVS subsystem are related to security, tamper
64 Many i.MX6 systems do not use a battery to provide power to the SNVS
70 Doing so allows SNVS to provide accurate time after a reboot, while the
|
| /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx6ull-dhcom-som.dtsi | 588 pinctrl_snvs_dhcom_a: snvs-dhcom-a-grp {
592 pinctrl_snvs_dhcom_b: snvs-dhcom-b-grp {
596 pinctrl_snvs_dhcom_c: snvs-dhcom-c-grp {
600 pinctrl_snvs_dhcom_d: snvs-dhcom-d-grp {
604 pinctrl_snvs_dhcom_e: snvs-dhcom-e-grp {
608 pinctrl_snvs_dhcom_f: snvs-dhcom-f-grp {
612 pinctrl_snvs_dhcom_g: snvs-dhcom-g-grp {
616 pinctrl_snvs_dhcom_h: snvs-dhcom-h-grp {
620 pinctrl_snvs_fec1_phy: snvs-fec1-phy-grp {
626 pinctrl_snvs_fec2_phy: snvs-fec2-phy-grp {
|
| H A D | imx6ull.dtsi | 7 #include "imx6ull-pinfunc-snvs.h"
78 iomuxc_snvs: iomuxc-snvs@2290000 {
79 compatible = "fsl,imx6ull-iomuxc-snvs";
|
| H A D | imx6sll.dtsi | 559 snvs: snvs@20cc000 { label
563 snvs_rtc: snvs-rtc-lp {
565 regmap = <&snvs>;
571 snvs_poweroff: snvs-poweroff {
573 regmap = <&snvs>;
579 snvs_pwrkey: snvs-powerkey {
581 regmap = <&snvs>;
|
| H A D | imx6ul.dtsi | 662 snvs: snvs@20cc000 { label
666 snvs_rtc: snvs-rtc-lp {
668 regmap = <&snvs>;
674 snvs_poweroff: snvs-poweroff {
676 regmap = <&snvs>;
683 snvs_pwrkey: snvs-powerkey {
685 regmap = <&snvs>;
692 snvs_lpgpr: snvs-lpgpr {
693 compatible = "fsl,imx6ul-snvs
[all...] |
| H A D | imx6qdl.dtsi | 821 snvs: snvs@20cc000 { label
825 snvs_rtc: snvs-rtc-lp {
827 regmap = <&snvs>;
833 snvs_poweroff: snvs-poweroff {
835 regmap = <&snvs>;
842 snvs_pwrkey: snvs-powerkey {
844 regmap = <&snvs>;
851 snvs_lpgpr: snvs-lpgpr {
852 compatible = "fsl,imx6q-snvs
[all...] |
| H A D | imx6ull-dhcor-maveo-box.dts | 334 pinctrl_snvs_hog_maveo_box: snvs-hog-maveo-box-grp {
347 pinctrl_snvs_wifi_gpio: snvs-wifi-gpio-grp {
353 pinctrl_snvs_zigbee_gpio: snvs-zigbee-gpio-grp {
|
| H A D | imx7s.dtsi | 625 snvs: snvs@30370000 {
629 snvs_rtc: snvs-rtc-lp {
631 regmap = <&snvs>;
636 clock-names = "snvs-rtc";
639 snvs_pwrkey: snvs-powerkey {
641 regmap = <&snvs>;
644 clock-names = "snvs-pwrkey";
611 snvs: snvs@30370000 { global() label
|
| H A D | imx6sl.dtsi | 653 snvs: snvs@20cc000 { label
657 snvs_rtc: snvs-rtc-lp {
659 regmap = <&snvs>;
665 snvs_poweroff: snvs-poweroff {
667 regmap = <&snvs>;
|
| H A D | imx6sx.dtsi | 745 snvs: snvs@20cc000 { label
749 snvs_rtc: snvs-rtc-lp {
751 regmap = <&snvs>;
756 snvs_poweroff: snvs-poweroff {
758 regmap = <&snvs>;
765 snvs_pwrkey: snvs-powerkey {
767 regmap = <&snvs>;
|
| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | fsl,imx6ul-pinctrl.txt | 8 "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller.
|
| /freebsd/sys/arm/freescale/imx/ |
| H A D | imx6_snvs.c | 180 device_set_desc(dev, "i.MX6 SNVS RTC"); in snvs_probe()
225 "snvs",
230 DRIVER_MODULE(snvs, simplebus, snvs_driver, 0, 0);
|
| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8mm.dtsi | 605 snvs: snvs@30370000 {
609 snvs_rtc: snvs-rtc-lp {
611 regmap = <&snvs>;
616 clock-names = "snvs-rtc";
619 snvs_pwrkey: snvs-powerkey {
621 regmap = <&snvs>;
624 clock-names = "snvs-pwrkey";
630 snvs_lpgpr: snvs-lpgpr {
631 compatible = "fsl,imx8mm-snvs
604 snvs: snvs@30370000 { global() label
[all...] |
| H A D | imx8mn.dtsi | 611 snvs: snvs@30370000 {
615 snvs_rtc: snvs-rtc-lp {
617 regmap = <&snvs>;
622 clock-names = "snvs-rtc";
625 snvs_pwrkey: snvs-powerkey {
627 regmap = <&snvs>;
630 clock-names = "snvs-pwrkey";
610 snvs: snvs@30370000 { global() label
|
| H A D | imx8mp.dtsi | 696 snvs: snvs@30370000 {
700 snvs_rtc: snvs-rtc-lp {
702 regmap = <&snvs>;
707 clock-names = "snvs-rtc";
710 snvs_pwrkey: snvs-powerkey {
712 regmap = <&snvs>;
715 clock-names = "snvs-pwrkey";
721 snvs_lpgpr: snvs-lpgpr {
722 compatible = "fsl,imx8mp-snvs
698 snvs: snvs@30370000 { global() label
[all...] |
| H A D | imx8mq.dtsi | 822 snvs: snvs@30370000 {
826 snvs_rtc: snvs-rtc-lp {
828 regmap = <&snvs>;
833 clock-names = "snvs-rtc";
836 snvs_pwrkey: snvs-powerkey {
838 regmap = <&snvs>;
841 clock-names = "snvs-pwrkey";
630 snvs: snvs@30370000 { global() label
|
| H A D | imx8mn-ddr4-evk.dts | 60 rohm,reset-snvs-powered;
|
| H A D | imx8mq-librem5-devkit.dts | 299 rohm,reset-snvs-powered;
377 /* leave on for snvs power button */
386 /* leave on for snvs power button */
|