Searched +full:smmu +full:- +full:secure +full:- +full:config +full:- +full:access (Results 1 – 6 of 6) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/iommu/ |
| H A D | arm,smmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wil
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| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_nb_regs.h | 1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
101 /* [0x6c] Read-only that reflects CPU Cluster Local GIC base high address */
103 /* [0x70] Read-only that reflects CPU Cluster Local GIC base low address */
105 /* [0x74] Read-only that reflects the device's IOGIC base high address. */
107 /* [0x78] Read-only that reflects IOGIC base low address */
299 uint32_t config; member
480 /* Value read in the Cluster ID Affinity Level-1 field, bits[15:8], of the Multiprocessor Affinity
485 /* Value read in the Cluster ID Affinity Level-2 field, bits[23:16], of the Multiprocessor Affinity
504 /* Disable write access to some secure GIC registers */
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| /freebsd/sys/contrib/device-tree/src/arm64/arm/ |
| H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cell
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| /freebsd/sys/contrib/dev/acpica/common/ |
| H A D | dmtbinfo2.c | 3 * Module Name: dmtbinfo2 - Table info for non-AML tables
11 * Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
157 /* This module used for application-level code only */
165 * - Add the C table definition to the actbl1.h or actbl2.h header.
166 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below.
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| /freebsd/sys/contrib/dev/acpica/include/ |
| H A D | actbl2.h | 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
11 * Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
195 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
198 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
204 * All tables must be byte-packed to match the ACPI specification, since
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| /freebsd/sys/contrib/dev/acpica/ |
| H A D | changes.txt | 1 ----------------------------------------
6 …AML Timer() operator. Discovered by UBSAN: ?array-index-out-of-bounds in acpica/dswexec.c:401:12 i…
12 1) ACPICA kernel-resident subsystem:
16 Fixed misspelled CDAT DSMAS define: ACPI_CEDT_DSMAS_NON_VOLATILE -> ACPI_CDAT_DSMAS_NON_VOLATILE. R…
18 1) ACPICA kernel-resident subsystem:
20 Fix GCC 12 dangling-pointer warning. We're storing a persistent pointer to an ephemeral local vari…
22 Also, some C run-times (like MUSL) aren't including <stdint.h> indirectly so we must include it exp…
31 ----------------------------------------
41 Add OS-specific support for Zephyr RTOS.
46 Add first batch of RISC-V related definitions.
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