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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dmediatek,smi-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SMI (Smart Multimedia Interface) Common
11 - Yong Wu <yong.wu@mediatek.com>
16 MediaTek SMI have two generations of HW architecture, here is the list
21 There's slight differences between the two SMI, for generation 2, the
23 for generation 1, the register is at smi ao base(smi always on register
24 base). Besides that, the smi async clock should be prepared and enabled for
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H A Dmediatek,smi-common.txt1 SMI (Smart Multimedia Interface) Common
5 Mediatek SMI have two generations of HW architecture, here is the list
10 There's slight differences between the two SMI, for generation 2, the
12 for generation 1, the register is at smi ao base(smi always on register
13 base). Besides that, the smi async clock should be prepared and enabled for
14 SMI generation 1 to transform the smi clock into emi clock domain, but that is
15 not needed for SMI generation 2.
18 - compatible : must be one of :
19 "mediatek,mt2701-smi-common"
20 "mediatek,mt2712-smi-common"
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/freebsd/sys/contrib/device-tree/Bindings/iommu/
H A Dmediatek,iommu.txt6 ARM Short-Descriptor translation table format for address translation.
14 +--------+
16 gals0-rx gals1-rx (Global Async Local Sync rx)
19 gals0-tx gals1-tx (Global Async Local Sync tx)
21 +--------+
23 SMI Common(Smart Multimedia Interface Common)
25 +----------------+-------
27 | gals-rx There may be GALS in some larbs.
30 | gals-tx
32 SMI larb0 SMI larb1 ... SoCs have several SMI local arbiter(larb).
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H A Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
23 #clock-cell
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H A Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8167.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt8167-clk.h>
9 #include <dt-bindings/memory/mt8167-larb-port.h>
10 #include <dt-bindings/power/mt8167-power.h>
12 #include "mt8167-pinfunc.h"
21 compatible = "mediatek,mt8167-topckgen", "syscon";
23 #clock-cells = <1>;
27 compatible = "mediatek,mt8167-infracfg", "syscon";
29 #clock-cells = <1>;
33 compatible = "mediatek,mt8167-apmixedsys", "syscon";
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H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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H A Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/memory/mt2712-larb-port.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt2712-power.h>
14 #include "mt2712-pinfunc.h"
18 interrupt-parent = <&sysirq>;
19 #address-cells = <2>;
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H A Dmt8365.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 #include <dt-bindings/clock/mediatek,mt8365-clk.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/power/mediatek,mt8365-power.h>
18 interrupt-parent = <&sysirq>;
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <1>;
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H A Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
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H A Dmt6795.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-binding
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-98dx3236-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,98dx3236-pinctrl" or "marvell,98dx4251-pinctrl"
8 - reg: register specifier of MPP registers
18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
45 mpp31 31 gpio, slv_smi(mdc), smi(mdc), dev(we1)
46 mpp32 32 gpio, slv_smi(mdio), smi(mdio), dev(cs1)
H A Dmarvell,armada-37xx-pinctrl.txt12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
17 common pinctrl bindings used by client devices, including the meaning
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
33 - pins 20-24
34 - functions jtag, gpio
37 - pins 8-10
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H A Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
35 mpp17 17 gpio, ua1(rxd), spi0(sck), sata1(prsnt) [1], sata0(prsnt) [1], smi(mdio)
38 mpp20 20 gpio, sata0(prsnt) [1], ua0(rts), ua1(txd), smi(mdc)
H A Dpinctrl_spear.txt4 - compatible : "st,spear300-pinmux"
5 : "st,spear310-pinmux"
6 : "st,spear320-pinmux"
7 : "st,spear1310-pinmux"
8 : "st,spear1340-pinmux"
9 - reg : Address range of the pinctrl registers
10 - st,pinmux-mode: Mandatory for SPEAr300 and SPEAr320 and invalid for others.
11 - Its values for SPEAr300:
12 - NAND_MODE : <0>
13 - NOR_MODE : <1>
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/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Drealtek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
17 switches. They can be controlled using different interfaces, like SMI,
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
26 The MDIO-connected switches use MDIO protocol to access their registers.
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/freebsd/tests/sys/cddl/zfs/tests/interop/
H A Dsetup.ksh1 #!/usr/local/bin/ksh93 -p
6 # Common Development and Distribution License (the "License").
48 if [[ $WRAPPER == *"smi"* && $META_DISK1 == $META_DISK0 ]]; then
55 if [[ $WRAPPER == *"smi"* && $ZFS_DISK2 == $META_DISK1 ]]; then
65 $RM -rf $TESTDIR || log_unresolved Could not remove $TESTDIR
66 $MKDIR -p $TESTDIR || log_unresolved Could not create $TESTDIR
73 log_must $METADB -a -f -c 3 $META_SIDE1
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/misc/
H A Dtst.roch.d5 * Common Development and Distribution License (the "License").
27 #pragma ident "%Z%%M% %I% %E% SMI"
35 #pragma ident "@(#)tst.roch.d 1.2 03/08/11 SMI"
46 /(self->done == 0) && (curthread->t_cpu->cpu_intr_actv == 0) /
48 self->done = 1;
56 /(self->done == 0) && (curthread->t_cpu->cpu_intr_actv == 0) /
58 self->done = 1;
77 mtx_lock:adaptive-acquire
83 mtx_unlock:adaptive-release
89 tick-1sec
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/stability/
H A Derr.D_ATTR_MIN.MinAttributes.d5 * Common Development and Distribution License (the "License").
27 #pragma ident "%Z%%M% %I% %E% SMI"
39 #pragma D option amin=Evolving/Evolving/Common
43 trace(curthread->t_procp);
/freebsd/cddl/contrib/opensolaris/tools/ctf/common/
H A Dctf_headers.h5 * Common Development and Distribution License, Version 1.0 only
30 #pragma ident "%Z%%M% %I% %E% SMI"
39 * $(SRC)/lib/libctf/common/libctf.h
40 * $(SRC)/uts/common/sys/ctf_api.h
41 * $(SRC)/uts/common/sys/ctf.h
47 * we can not simply force the order of inclusion with -I/usr/include first
49 * ctf headers. Depending on the order of the -I includes, we can also have
52 * $(SRC)/uts/common/sys.
60 * 2) In $(SRC)/tools/ctf/Makefile.ctf, we order the -I includes such
62 * live, followed by /usr/include, followed by $(SRC)/uts/common.
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/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/arrays/
H A Dtst.uregsarray.d5 * Common Development and Distribution License (the "License").
28 #pragma ident "%Z%%M% %I% %E% SMI"
33 * Positive test to make sure that we can invoke common
38 * NOTES: This test does no verification - the value of the output
/freebsd/contrib/file/magic/Magdir/
H A Dmodem2 #------------------------------------------------------------------------------
7 1 string PC\ Research,\ Inc Digifax-G3-File
18 # 16 0-bits near beginning like True Type fonts *.ttf, Postscript PrinterFontMetric *.pfm, FTYPE.HY…
20 # maximal 7 0-bits for pixel sequences or 11 0-bits for EOL in G3
22 # skip IRCAM file (VAX big-endian) ./audio
37 # skip few (5/41) DEGAS mid-res bitmap (GEMINI01.PI2 GEMINI02.PI2 GEMINI03.PI2 CODE_RAM.PI2 TBX_DEM…
39 >>>>>>>>-0 offset !32034 raw G3 (Group 3) FAX, byte-padded
40 # version 5.25 labeled the entry above "raw G3 data, byte-padded"
47 # 16 0-bits near beginning like PicturePuzzler found on Golden Orchard Apple CD Rom
49 # maximal 7 0-bits for pixel sequences or 11 0-bits for EOL in G3
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/freebsd/sys/cddl/contrib/opensolaris/uts/common/sys/
H A Dzmod.h5 * Common Development and Distribution License (the "License").
30 #pragma ident "%Z%%M% %I% %E% SMI"
37 * zmod - RFC-1950-compatible decompression routines
39 * This file provides the public interfaces to zmod, an in-kernel RFC 1950
41 * interfaces can be found in the usr/src/uts/common/zmod/ directory.
47 #define Z_ERRNO (-1)
48 #define Z_STREAM_ERROR (-2)
49 #define Z_DATA_ERROR (-3)
50 #define Z_MEM_ERROR (-4)
51 #define Z_BUF_ERROR (-5)
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/freebsd/sys/cddl/boot/zfs/
H A Dlzjb.c5 * Common Development and Distribution License (the "License").
27 /*#pragma ident "%Z%%M% %I% %E% SMI"*/
31 * 1. If we didn't, anyone modifying common/os/compress.c would
34 * common/os version needs and uses
36 * take a destination buffer size and return -1 if the data will not
42 #define MATCH_MAX ((1 << MATCH_BITS) + (MATCH_MIN - 1))
43 #define OFFSET_MASK ((1 << (16 - MATCH_BITS)) - 1)
54 int copymask = 1 << (NBBY - 1); in lzjb_decompress()
62 int mlen = (src[0] >> (NBBY - MATCH_BITS)) + MATCH_MIN; in lzjb_decompress()
65 if ((cpy = dst - offset) < (unsigned char *)d_start) in lzjb_decompress()
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