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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,smd-rpm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Resource Power Manager (RPM) over SMD/GLINK
15 The SMD or GLINK information for the RPM edge should be filled out. See
16 qcom,smd.yaml for the required edge properties. All SMD/GLINK related
23 Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml
28 - Andy Gross <agross@kernel.org>
29 - Bjorn Andersson <bjorn.andersson@linaro.org>
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H A Dqcom,smd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,smd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 Using the top-level SMD node is deprecated. Instead, the SMD edges are defined
26 const: qcom,smd
29 "^smd-edge|rpm$":
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H A Dqcom,apr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
20 - qcom,apr
21 - qcom,apr-v2
22 - qcom,gpr
24 power-domains:
27 qcom,apr-domain:
59 qcom,glink-channels:
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,rpm-proc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,rpm-proc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
12 - Stephan Gerhold <stephan@gerhold.net>
17 +--------------------------------------------+
18 | RPM subsystem (qcom,rpm-proc) |
20 reset | +---------------+ +-----+ +-----+ |
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H A Dqcom,pas-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 clock-names:
30 - description: Watchdog interrupt
31 - description: Fatal interrupt
32 - description: Ready interrupt
33 - description: Handover interrupt
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H A Dqcom,glink-rpm-edge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,glink-rpm-edge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm G-Link RPM edge
10 Qualcomm G-Link edge, a FIFO based mechanism for communication with Resource
14 - Bjorn Andersson <andersson@kernel.org>
18 const: qcom,glink-rpm
30 - description: rpm_hlos mailbox in APCS
32 qcom,remote-pid:
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H A Dqcom,q6v5.txt6 - compatible:
10 "qcom,ipq8074-wcss-pil"
11 "qcom,qcs404-wcss-pil"
13 - reg:
15 Value type: <prop-encoded-array>
19 - reg-names:
24 - interrupts-extended:
26 Value type: <prop-encoded-array>
27 Definition: reference to the interrupts that match interrupt-names
29 - interrupt-names:
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/linux/net/qrtr/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
18 tristate "SMD IPC Router channels"
21 Say Y here to support SMD based ipcrouter channels. SMD is the
32 tristate "MHI IPC Router channels"
35 Say Y here to support MHI based ipcrouter channels. MHI is the
/linux/drivers/rpmsg/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
15 in /dev. They make it possible for user-space programs to send and
23 allows user-space programs to create endpoints with specific service name,
39 Say y here to enable support providing communication channels to
68 tristate "Qualcomm Shared Memory Driver (SMD)"
74 providing communication channels to remote processors in Qualcomm
/linux/drivers/interconnect/qcom/
H A Dicc-rpm.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/soc/qcom/smd-rpm.h>
11 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
13 #include <linux/interconnect-provider.h>
29 * struct rpm_clk_resource - RPM bus clock resource
41 * struct qcom_icc_provider - Qualcomm specific interconnect provider
47 * @ab_coeff: a percentage-based coefficient for compensating the AB calculations
48 * @ib_coeff: an inverse-percentage-based coefficient for compensating the IB calculations
51 * @bus_clk: a pointer to a HLOS-owned bus clock
73 * struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters
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/linux/drivers/bluetooth/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
188 bool "Three-wire UART (H5) protocol support"
192 The HCI Three-wire UART Transport Layer makes it possible to
194 Three-wire UART Transport Layer assumes that the UART
198 Say Y here to compile support for Three-wire UART protocol.
235 The Realtek protocol support enables Bluetooth HCI over 3-Wire
247 The Qualcomm Atheros protocol supports HCI In-Band Sleep feature
401 tristate "Marvell BT-over-SDIO driver"
412 Say Y here to compile support for Marvell BT-over-SDIO driver
456 tristate "Qualcomm SMD based HCI support"
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8917.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
4 #include <dt-bindings/clock/qcom,gcc-msm8917.h>
5 #include <dt-bindings/clock/qcom,rpmcc.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/power/qcom-rpmpd.h>
8 #include <dt-bindings/thermal/thermal.h>
11 interrupt-parent = <&intc>;
13 #address-cells = <2>;
14 #size-cells = <2>;
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H A Dmsm8976.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno
9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
10 #include <dt-bindings/clock/qcom,gcc-msm8976.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/power/qcom-rpmpd.h>
18 interrupt-parent = <&intc>;
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H A Dsm6125.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
16 interrupt-parent = <&intc>;
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H A Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
8 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
9 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
10 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/interconnect/qcom,sdm660.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/gpio/gpio.h>
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H A Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
10 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
11 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
12 #include <dt-bindings/clock/qcom,rpmcc.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
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H A Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
11 #include <dt-bindings/gpio/gpio.h>
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H A Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
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/linux/drivers/net/wireless/ath/wcn36xx/
H A Dsmd.c24 #include "smd.h"
145 WCN36XX_CFG_VAL(ASD_TRIGGER_THRESHOLD, -60),
189 return -ENOMEM; in put_cfg_tlv_u32()
192 entry = (struct wcn36xx_hal_cfg *) (wcn->hal_buf + *len); in put_cfg_tlv_u32()
193 entry->id = id; in put_cfg_tlv_u32()
194 entry->len = sizeof(u32); in put_cfg_tlv_u32()
195 entry->pad_bytes = 0; in put_cfg_tlv_u32()
196 entry->reserve = 0; in put_cfg_tlv_u32()
211 bss_params->nw_type = WCN36XX_HAL_11A_NW_TYPE; in wcn36xx_smd_set_bss_nw_type()
212 else if (sta && sta->deflink.ht_cap.ht_supported) in wcn36xx_smd_set_bss_nw_type()
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H A Dmain.c132 .channels = wcn_2ghz_channels,
155 .channels = wcn_5ghz_channels,
190 return NL80211_IFTYPE_STATION == vif->type ? in get_sta_index()
191 sta_priv->bss_sta_index : in get_sta_index()
192 sta_priv->sta_index; in get_sta_index()
200 if (wcn36xx_firmware_get_feat_caps(wcn->fw_feat_caps, i)) { in wcn36xx_feat_caps_info()
209 struct wcn36xx *wcn = hw->priv; in wcn36xx_start()
214 /* SMD initialization */ in wcn36xx_start()
217 wcn36xx_err("Failed to open smd channel: %d\n", ret); in wcn36xx_start()
263 INIT_LIST_HEAD(&wcn->vif_list); in wcn36xx_start()
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H A Dhal.h20 /*---------------------------------------------------------------------------
32 All values are in the range 0..255 (ie they are 8-bit values)
33 ---------------------------------------------------------------------------*/
57 /* Minimum PVM size that the FW expects. See comment in smd.c for details. */
91 /* How many frames until we start a-mpdu TX session */
99 /* Init/De-Init */
438 /* 20/40MHZ offset-HIGH 40/80MHZ offset HIGH */
493 /* Added for BT-AMP support */
496 /* Added for BT-AMP support */
574 /* BT-AMP Case */
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/linux/include/linux/
H A Dethtool.h1 /* SPDX-License-Identifier: GPL-2.0 */
50 * enum ethtool_phys_id_state - indicator state for physical identification
66 ETH_RSS_HASH_TOP_BIT, /* Configurable RSS hash function - Toeplitz */
67 ETH_RSS_HASH_XOR_BIT, /* Configurable RSS hash function - Xor */
68 ETH_RSS_HASH_CRC32_BIT, /* Configurable RSS hash function - Crc32 */
78 * struct kernel_ethtool_ringparam - RX/TX ring configuration
103 * enum ethtool_supported_ring_param - indicator caps for setting ring params
110 * @ETHTOOL_RING_USE_HDS_THRS: capture for setting header-data-split-thresh
151 * In a simpler world it should be equal to netdev->carrier_down_count
153 * actually take the physical link down, not to mention NC-SI which,
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