Home
last modified time | relevance | path

Searched +full:smc +full:- +full:id (Results 1 – 25 of 144) sorted by relevance

123456

/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Darm-smc-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id
[all...]
/freebsd/sys/contrib/device-tree/Bindings/firmware/
H A Darm,scmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/firmware/arm,scmi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
26 - $ref: /schemas/firmware/nxp,imx95-scmi.yaml
34 - description: SCMI compliant firmware with mailbox transport
36 - const: arm,scmi
37 - description: SCMI compliant firmware with ARM SMC/HVC transport
39 - const: arm,scmi-smc
[all …]
H A Dbrcm,kona-smc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/firmware/brcm,kona-smc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 A bounce buffer used for non-secure to secure communications.
13 - Florian Fainelli <f.fainelli@gmail.com>
18 - enum:
19 - brcm,bcm11351-smc
20 - brcm,bcm21664-smc
21 - brcm,bcm23550-smc
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Darm,pl353-smc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl353-smc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM PL353 Static Memory Controller (SMC) device-tree bindings
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
23 const: arm,pl353-smc-r2p1
25 - compatible
29 pattern: "^memory-controller@[0-9a-f]+$"
[all …]
H A Datmel,ebi.txt5 The EBI provides a glue-less interface to asynchronous memories through the SMC
10 - compatible: "atmel,at91sam9260-ebi"
11 "atmel,at91sam9261-ebi"
12 "atmel,at91sam9263-ebi0"
13 "atmel,at91sam9263-ebi1"
14 "atmel,at91sam9rl-ebi"
15 "atmel,at91sam9g45-ebi"
16 "atmel,at91sam9x5-ebi"
17 "atmel,sama5d3-ebi"
18 "microchip,sam9x60-ebi"
[all …]
H A Darm,pl35x-smc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl35x-smc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm PL35x Series Static Memory Controller (SMC)
10 - Miquel Raynal <miquel.raynal@bootlin.com>
18 https://documentation-service.arm.com/static/5e8e2524fd977155116a58aa
26 - arm,pl353-smc-r2p1
27 - arm,pl354
29 - compatible
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Darm,scmi.txt2 ----------------------------------------------------------
17 - compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
18 - mboxes: List of phandle and mailbox channel specifiers. It should contain
22 - shmem : List of phandle pointing to the shared memory(SHM) area as per
24 - #address-cells : should be '1' if the device has sub-nodes, maps to
25 protocol identifier for a given sub-node.
26 - #size-cells : should be '0' as 'reg' property doesn't have any size
28 - arm,smc-id : SMC id required when using smc or hvc transports
32 - mbox-names: shall be "tx" or "rx" depending on mboxes entries.
34 - interrupts : when using smc or hvc transports, this optional
[all …]
H A Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/psci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
15 processors") can be used by Linux to initiate various CPU-centri
[all...]
/freebsd/sys/dev/firmware/arm/
H A Dscmi_smc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
75 len = OF_getencprop(node, "arm,smc-id", &sc->smc_id, in scmi_smc_transport_init()
76 sizeof(sc->smc_id)); in scmi_smc_transport_init()
78 device_printf(dev, "No SMC ID found\n"); in scmi_smc_transport_init()
82 device_printf(dev, "smc id %x\n", sc->smc_id); in scmi_smc_transport_init()
84 sc->a2p_dev = scmi_shmem_get(dev, node, SCMI_CHAN_A2P); in scmi_smc_transport_init()
85 if (sc->a2p_dev == NULL) { in scmi_smc_transport_init()
90 sc->base.trs_desc.no_completion_irq = true; in scmi_smc_transport_init()
91 sc->base.trs_desc.reply_timo_ms = 30; in scmi_smc_transport_init()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dxlnx,zynqmp-ipi-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id
[all...]
H A Dxlnx,zynqmp-ipi-mailbox.txt8 +-------------------------------------+
10 +-------------------------------------+
11 +--------------------------------------------------+
15 +--------------------------+ |
18 +--------------------------------------------------+
19 +------------------------------------------+
20 | +----------------+ +----------------+ |
24 | +----------------+ +----------------+ |
27 +------------------------------------------+
33 --------------------
[all …]
/freebsd/sys/dev/firmware/xilinx/
H A Dzynqmp_firmware.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
96 /* SMC calling methods */
100 zynqmp_call_smc(uint32_t id, uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3, uint32_t *payload,… in zynqmp_call_smc() argument
105 args[0] = id | PM_SIP_SVC; in zynqmp_call_smc()
131 device_printf(sc->dev, "SMC Call fail %d\n", rv); in zynqmp_get_api_version()
134 device_printf(sc->dev, "API version = %d.%d\n", in zynqmp_get_api_version()
148 device_printf(sc->dev, "SMC Call fail %d\n", rv); in zynqmp_get_chipid()
151 device_printf(sc->dev, "ID Code = %x Version = %x\n", in zynqmp_get_chipid()
165 device_printf(sc->dev, "SMC Call fail %d\n", rv); in zynqmp_get_trustzone_version()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/firmware/
H A Dsdei.txt6 firmware-first error handling, or from an IRQ that has been promoted to
7 a firmware-assisted NMI.
12 below) and passing arguments in a manner specified by the "SMC Calling
15 r0 => 32-bit Function ID / return value
16 {r1 - r3} => Parameters
27 - compatible : should contain:
28 * "arm,sdei-1.0" : For implementations complying to SDEI version 1.x.
30 - method : The method of calling the SDEI firmware. Permitted
32 * "smc" : SMC #0, with the register assignments specified in this
39 compatible = "arm,sdei-1.0";
[all …]
H A Dlinaro,optee-tz.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/firmware/linaro,optee-tz.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: OP-TEE
10 - Jens Wiklander <jens.wiklander@linaro.org>
13 OP-TEE is a piece of software using hardware features to provide a Trusted
25 const: linaro,optee-tz
31 software is expected to be either a per-cpu interrupt or an
32 edge-triggered peripheral interrupt.
[all …]
/freebsd/sys/arm/qualcomm/
H A Dqcom_scm_legacy_defs.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
38 * in an SMC instruction call.
41 * same as the non-legacy 32/64 bit FNID mapping layout.
48 * The first kind are the normal ones - up to a defined max of arguments,
53 * The second kind are what are termed "atomic" SCM calls -
58 * in memory. The latter use defines and a direct SMC call with the
75 * for an SMC instruction call.
100 * len - the length of the total command and response, including
103 * buf_offset - the offset inside the buffer, starting at the
[all …]
/freebsd/sys/dev/asmc/
H A Dasmc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * Driver for Apple's System Management Console (SMC).
32 * SMC can be found on the MacBook, MacBook Pro and Mac Mini.
67 * SMC functions.
162 "MacBook1,1", "Apple SMC MacBook Core Duo",
168 "MacBook2,1", "Apple SMC MacBook Core 2 Duo",
174 "MacBook3,1", "Apple SMC MacBook Core 2 Duo",
180 "MacBook7,1", "Apple SMC MacBook Core 2 Duo (mid 2010)",
186 "MacBookPro1,1", "Apple SMC MacBook Pro Core Duo (15-inch)",
[all …]
/freebsd/sys/arm/ti/
H A Dti_smc.S1 /*-
28 .cpu cortex-a8
31 /* Issue a smc #0 call */
32 /* r0 and r1 contains the eventual arguments, r2 contains the function ID */
34 stmfd sp!, {r4-r12, lr}
35 mov r12, r2 /* the rom expects the function ID in r12 */
37 smc #0
38 ldmfd sp!, {r4-r12, pc}
/freebsd/sys/contrib/device-tree/Bindings/firmware/xilinx/
H A Dxlnx,zynqmp-firmware.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
12 description: The zynqmp-firmware node describes the interface to platform
23 - description: For implementations complying for Zynq Ultrascale+ MPSoC.
24 const: xlnx,zynqmp-firmware
26 - description: For implementations complying for Versal.
27 const: xlnx,versal-firmware
[all …]
/freebsd/sys/contrib/device-tree/Bindings/interconnect/
H A Dmediatek,mt8183-emi.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/mediatek,mt8183-emi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
16 Call (SMC).
19 ---- ----
20 _________ |CPU | |--- |VPU |
21 _____ | |----- ---- | ----
22 | |->| DRAM | ---- | ----
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Ds32g2.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 * Copyright 2017-2021, 2024 NXP
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "arm,scmi-shmem";
[all …]
H A Ds32g3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright 2021-2024 NXP
7 * Andra-Teodora Ilie <andra.ilie@nxp.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <0x02>;
16 #size-cells = <0x02>;
19 #address-cells = <1>;
20 #size-cells = <0>;
22 cpu-map {
[all …]
/freebsd/sys/dev/mii/
H A Dmiidevs3 /*-
35 * For a complete list see http://standards-oui.ieee.org/
38 * to the 22 bits available in the id registers.
39 * IEEE 802.3u-1995, subclause 22.2.4.3.1, figure 22-12, depicts the right
40 * mapping; the bit positions are defined in IEEE 802-1990, figure 5.2.
41 * (There is a formal 802.3 interpretation, number 1-07/98 of July 09 1998,
68 oui PMCSIERRA 0x00e004 PMC-Sierra
74 oui SMC 0x00800f SMC
109 oui xxPMCSIERRA 0x0009c0 PMC-Sierra
110 oui xxPMCSIERRA2 0x009057 PMC-Sierra
[all …]
/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dxlnx,zynqmp-aes.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP AES-GCM Hardware Accelerator
10 - Kalyani Akula <kalyani.akula@amd.com>
11 - Michal Simek <michal.simek@amd.com>
14 The ZynqMP AES-GCM hardened cryptographic accelerator is used to
19 const: xlnx,zynqmp-aes
22 - compatible
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dxlnx,versal-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/xlnx,versal-cl
[all...]
/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Dxlnx,zynqmp-nvmem.txt1 --------------------------------------------------------------------------
3 --------------------------------------------------------------------------
8 - compatible: should be "xlnx,zynqmp-nvmem-fw"
11 Are child nodes of silicon id, bindings of which as described in
14 -------
16 -------
18 zynqmp_firmware: zynqmp-firmware {
19 compatible = "xlnx,zynqmp-firmware";
20 method = "smc";
23 compatible = "xlnx,zynqmp-nvmem-fw";
[all …]

123456