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Searched +full:sm8450 +full:- +full:tlmm (Results 1 – 21 of 21) sorted by relevance

/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8450-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SM8450 TLMM block
10 - Vinod Koul <vkoul@kernel.org>
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8450 SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sm8450-tlmm
28 gpio-reserved-ranges:
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H A Dqcom,sm8450-lpass-lpi-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8450 SoC LPASS LPI TLMM
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8450 SoC.
18 const: qcom,sm8450-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8450-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
10 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350b.h>
11 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
12 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
13 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
14 #include "sm8450.dtsi"
23 model = "Qualcomm Technologies, Inc. SM8450 HDK";
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H A Dsm8450-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include "sm8450.dtsi"
19 model = "Qualcomm Technologies, Inc. SM8450 QRD";
20 compatible = "qcom,sm8450-qrd", "qcom,sm8450";
21 chassis-type = "handset";
28 stdout-path = "serial0:115200n8";
31 vph_pwr: vph-pwr-regulator {
32 compatible = "regulator-fixed";
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H A Dsm8450-sony-xperia-nagara-pdx224.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include "sm8450-sony-xperia-nagara.dtsi"
13 compatible = "sony,pdx224", "qcom,sm8450";
15 imx563_vdig_regulator: imx563-vdig-regulator {
16 compatible = "regulator-fixed";
17 regulator-name = "imx563_vdig_regulator";
18 gpio = <&tlmm 22 GPIO_ACTIVE_HIGH>;
19 enable-active-high;
21 pinctrl-names = "default";
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H A Dsm8450-sony-xperia-nagara.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
8 #include "sm8450.dtsi"
16 /delete-node/ &adsp_mem;
17 /delete-node/ &rmtfs_mem;
18 /delete-node/ &video_mem;
21 chassis-type = "handset";
28 stdout-path = "serial0:115200n8";
31 gpio-keys {
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H A Dsm8450-sony-xperia-nagara-pdx223.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include "sm8450-sony-xperia-nagara.dtsi"
13 compatible = "sony,pdx223", "qcom,sm8450";
15 imx316_lvdd_regulator: imx316-lvdd-regulator {
16 compatible = "regulator-fixed";
17 regulator-name = "imx316_lvdd_regulator";
19 enable-active-high;
21 pinctrl-names = "default";
22 pinctrl-0 = <&cam_pwr_ld_en>;
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H A Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
H A Dsm8650-mtp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
21 compatible = "qcom,sm8650-mtp", "qcom,sm8650";
28 stdout-path = "serial0:115200n8";
31 pmic-glink {
32 compatible = "qcom,sm8650-pmic-glink",
33 "qcom,sm8550-pmic-glink",
34 "qcom,pmic-glink";
35 #address-cells = <1>;
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H A Dsm8550-mtp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 compatible = "qcom,sm8550-mtp", "qcom,sm8550";
23 chassis-type = "handset";
29 wcd938x: audio-codec {
30 compatible = "qcom,wcd9385-codec";
32 pinctrl-names = "default";
33 pinctrl-0 = <&wcd_default>;
35 qcom,micbias1-microvolt = <1800000>;
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H A Dsm8550-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 compatible = "qcom,sm8550-hdk", "qcom,sm8550";
23 chassis-type = "embedded";
30 wcd938x: audio-codec {
31 compatible = "qcom,wcd9385-codec";
33 pinctrl-names = "default";
34 pinctrl-0 = <&wcd_default>;
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H A Dsm8550-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 compatible = "qcom,sm8550-qrd", "qcom,sm8550";
24 chassis-type = "handset";
31 wcd938x: audio-codec {
32 compatible = "qcom,wcd9385-codec";
34 pinctrl-names = "default";
35 pinctrl-0 = <&wcd_default>;
[all …]
H A Dsm8650-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
21 compatible = "qcom,sm8650-hdk", "qcom,sm8650";
22 chassis-type = "embedded";
30 stdout-path = "serial0:115200n8";
33 hdmi-out {
34 compatible = "hdmi-connector";
39 remote-endpoint = <&lt9611_out>;
[all …]
H A Dsm8650-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 compatible = "qcom,sm8650-qrd", "qcom,sm8650";
30 stdout-path = "serial0:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
36 pinctrl-0 = <&volume_up_n>;
37 pinctrl-names = "default";
[all …]
H A Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sm8450.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8450.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8450 PCI Express Root Complex
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
14 Qualcomm SM8450 SoC PCIe root complex controller is based on the Synopsys
20 - qcom,pcie-sm8450-pcie0
21 - qcom,pcie-sm8450-pcie1
[all …]
H A Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
19 - items:
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/linux/drivers/pinctrl/qcom/
H A DKconfig.msm1 # SPDX-License-Identifier: GPL-2.0-only
9 Qualcomm TLMM block found in the Qualcomm APQ8064 platform.
16 Qualcomm TLMM block found in the Qualcomm APQ8084 platform.
23 Qualcomm TLMM block found in the Qualcomm IPQ4019 platform.
30 the Qualcomm Technologies Inc. TLMM block found on the
39 Qualcomm TLMM block found in the Qualcomm IPQ8064 platform.
46 Qualcomm Technologies Inc TLMM block found on the Qualcomm
54 the Qualcomm Technologies Inc. TLMM block found on the
63 the Qualcomm Technologies Inc. TLMM block found on the
72 the Qualcomm Technologies Inc. TLMM block found on the
[all …]
H A Dpinctrl-sm8450.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
11 #include "pinctrl-msm.h"
66 .mux_bit = -1, \
69 .oe_bit = -1, \
70 .in_bit = -1, \
71 .out_bit = -1, \
72 .intr_enable_bit = -1, \
73 .intr_status_bit = -1, \
74 .intr_target_bit = -1, \
[all …]
/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,ufs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Andy Gross <agross@kernel.org>
13 # Select only our matches, not all jedec,ufs-2.0
20 - compatible
25 - enum:
26 - qcom,msm8994-ufshc
27 - qcom,msm8996-ufshc
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/linux/Documentation/devicetree/bindings/i2c/
H A Dqcom,i2c-cci.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Loic Poulain <loic.poulain@linaro.org>
11 - Robert Foss <robert.foss@linaro.org>
16 - enum:
17 - qcom,msm8226-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
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