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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,rpmh.yaml82 - qcom,sm8250-aggre1-noc
83 - qcom,sm8250-aggre2-noc
84 - qcom,sm8250-compute-noc
85 - qcom,sm8250-config-noc
86 - qcom,sm8250-dc-noc
87 - qcom,sm8250-gem-noc
88 - qcom,sm8250-mc-virt
89 - qcom,sm8250-mmss-noc
90 - qcom,sm8250-npu-noc
91 - qcom,sm8250-qup-virt
[all …]
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm8250-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-mdss.yaml#
7 title: Qualcomm SM8250 Display MDSS
15 bindings of MDSS are mentioned for SM8250 target.
21 const: qcom,sm8250-mdss
53 const: qcom,sm8250-dpu
62 - const: qcom,sm8250-dp
72 - const: qcom,sm8250-dsi-ctrl
90 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
91 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
94 #include <dt-bindings/interconnect/qcom,sm8250.h>
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,camcc-sm8250.yaml4 $id: http://devicetree.org/schemas/clock/qcom,camcc-sm8250.yaml#
7 title: Qualcomm Camera Clock & Reset Controller on SM8250
14 power domains on SM8250.
16 See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h
23 const: qcom,sm8250-camcc
60 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
63 compatible = "qcom,sm8250-camcc";
H A Dqcom,audiocc-sm8250.yaml4 $id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
7 title: LPASS Audio Clock Controller on SM8250 SoCs
15 See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list
20 const: qcom,sm8250-lpass-audiocc
51 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
55 compatible = "qcom,sm8250-lpass-audiocc";
H A Dqcom,aoncc-sm8250.yaml4 $id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
7 title: LPASS Always ON Clock Controller on SM8250 SoCs
15 See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
20 const: qcom,sm8250-lpass-aoncc
51 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
55 compatible = "qcom,sm8250-lpass-aoncc";
H A Dqcom,gcc-sm8250.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM8250
15 domains on SM8250.
17 See also:: include/dt-bindings/clock/qcom,gcc-sm8250.h
21 const: qcom,gcc-sm8250
50 compatible = "qcom,gcc-sm8250";
H A Dqcom,dispcc-sm8x50.yaml7 title: Qualcomm Display Clock & Reset Controller on SM8150/SM8250/SM8350
14 domains on SM8150/SM8250/SM8350.
18 include/dt-bindings/clock/qcom,dispcc-sm8250.h
26 - qcom,sm8250-dispcc
101 compatible = "qcom,sm8250-dispcc";
H A Dqcom,videocc.yaml22 include/dt-bindings/clock/qcom,videocc-sm8250.h
32 - qcom,sm8250-videocc
130 - qcom,sm8250-videocc
H A Dqcom,gpucc.yaml25 include/dt-bindings/clock/qcom,gpucc-sm8250.h
41 - qcom,sm8250-gpucc
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8250-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8250 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8250 SoC.
18 const: qcom,sm8250-lpass-lpi-pinctrl
36 - $ref: "#/$defs/qcom-sm8250-lpass-state"
39 $ref: "#/$defs/qcom-sm8250-lpass-state"
43 qcom-sm8250-lpass-state:
87 compatible = "qcom,sm8250-lpass-lpi-pinctrl";
H A Dqcom,sm8250-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-pinctrl.yaml#
7 title: Qualcomm Technologies, Inc. SM8250 TLMM block
13 Top Level Mode Multiplexer pin controller in the Qualcomm SM8250 SoC.
17 const: qcom,sm8250-pinctrl
41 - $ref: "#/$defs/qcom-sm8250-tlmm-state"
44 $ref: "#/$defs/qcom-sm8250-tlmm-state"
48 qcom-sm8250-tlmm-state:
108 compatible = "qcom,sm8250-pinctrl";
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sm8250.yaml4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8250.yaml#
7 title: Qualcomm SM8250 PCI Express Root Complex
14 Qualcomm SM8250 SoC PCIe root complex controller is based on the Synopsys
19 const: qcom,pcie-sm8250
93 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
95 #include <dt-bindings/interconnect/qcom,sm8250.h>
103 compatible = "qcom,pcie-sm8250";
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-wsa-macro.yaml17 - qcom,sm8250-lpass-wsa-macro
68 - qcom,sm8250-lpass-wsa-macro
106 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
109 compatible = "qcom,sm8250-lpass-wsa-macro";
/linux/Documentation/devicetree/bindings/regulator/
H A Dqcom,sdm845-refgen-regulator.yaml36 - const: qcom,sm8250-refgen-regulator
40 - qcom,sm8250-refgen-regulator
54 compatible = "qcom,sm8250-refgen-regulator";
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8250.dtsi7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
15 #include <dt-bindings/interconnect/qcom,sm8250.h>
24 #include <dt-bindings/clock/qcom,camcc-sm8250.h>
25 #include <dt-bindings/clock/qcom,videocc-sm8250.h>
375 compatible = "qcom,sm8250-qup-virt";
672 compatible = "qcom,scm-sm8250", "qcom,scm";
949 compatible = "qcom,gcc-sm8250";
963 compatible = "qcom,sm8250-ipcc", "qcom,ipcc";
[all …]
H A Dsm8250-xiaomi-elish-csot.dts8 #include "sm8250-xiaomi-elish-common.dtsi"
12 compatible = "xiaomi,elish", "qcom,sm8250";
H A Dsm8250-xiaomi-elish-boe.dts8 #include "sm8250-xiaomi-elish-common.dtsi"
12 compatible = "xiaomi,elish", "qcom,sm8250";
H A Dsm8250-xiaomi-elish-common.dtsi10 #include "sm8250.dtsi"
17 * Delete following upstream (sm8250.dtsi) reserved
30 qcom,msm-id = <QCOM_ID_SM8250 0x20001>; /* SM8250 v2.1 */
225 firmware-name = "qcom/sm8250/xiaomi/elish/adsp.mbn";
535 firmware-name = "qcom/sm8250/xiaomi/elish/cdsp.mbn";
560 firmware-name = "qcom/sm8250/xiaomi/elish/a650_zap.mbn";
788 firmware-name = "qcom/sm8250/xiaomi/elish/slpi.mbn";
870 firmware-name = "qcom/sm8250/xiaomi/elish/venus.mbn";
/linux/drivers/clk/qcom/
H A Dlpass-gfm-sm8250.c20 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
21 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
293 .compatible = "qcom,sm8250-lpass-aoncc",
297 .compatible = "qcom,sm8250-lpass-audiocc",
318 MODULE_DESCRIPTION("QTI SM8250 LPASS Glitch Free Mux clock driver");
H A Dvideocc-sm8250.c12 #include <dt-bindings/clock/qcom,videocc-sm8250.h>
359 { .compatible = "qcom,sm8250-videocc" },
400 .name = "sm8250-videocc",
408 MODULE_DESCRIPTION("QTI VIDEOCC SM8250 Driver");
/linux/sound/soc/qcom/
H A DMakefile28 snd-soc-sm8250-y := sm8250.o
42 obj-$(CONFIG_SND_SOC_SM8250) += snd-soc-sm8250.o
H A Dsm8250.c19 #define DRIVER_NAME "sm8250"
209 {.compatible = "qcom,sm8250-sndcard"},
220 .name = "snd-sm8250",
226 MODULE_DESCRIPTION("SM8250 ASoC Machine Driver");
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sm8250-lpass-lpi.c130 .compatible = "qcom,sm8250-lpass-lpi-pinctrl",
139 .name = "qcom-sm8250-lpass-lpi-pinctrl",
147 MODULE_DESCRIPTION("QTI SM8250 LPI GPIO pin control driver");
/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-msm.yaml65 - qcom,sm8250-sdhci
226 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
231 compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5";
/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom-ipcc.yaml37 - qcom,sm8250-ipcc
81 compatible = "qcom,sm8250-ipcc", "qcom,ipcc";

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