Searched +full:slow +full:- +full:io +full:- +full:gpios (Results 1 – 7 of 7) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
H A D | microchip,pac1934.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marius Cristea <marius.cristea@microchip.com> 16 …oads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/PAC1931-Family-Data-Sheet-DS20005850E.… 21 - microchip,pac1931 22 - microchip,pac1932 23 - microchip,pac1933 24 - microchip,pac1934 29 "#address-cells": [all …]
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/freebsd/sys/contrib/device-tree/Bindings/bus/ |
H A D | qcom,ebi2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 external memory (such as NAND or other memory-mapped peripherals) whereas 25 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me. 31 CS0 GPIO134 0x1a800000-0x1b000000 (8MB) 32 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB) 33 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB) 34 CS3 GPIO133 0x1d000000-0x25000000 (128 MB) 35 CS4 GPIO132 0x1c800000-0x1d000000 (8MB) [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | intel,pinctrl-keembay.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-keembay.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> 19 const: intel,keembay-pinctrl 24 gpio-controller: true 26 '#gpio-cells': 30 description: The number of GPIOs exposed. 39 interrupt-controller: true [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | rockchip,rk808.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chris Zhong <zyw@rock-chips.com> 11 - Zhang Qing <zhangqing@rock-chips.com> 20 - rockchip,rk808 28 '#clock-cells': 30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs. 33 clock-output-names: 38 rockchip,system-power-controller: [all …]
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/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-apq8060-dragonboard.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/leds/common.h> 5 #include <dt-bindings/pinctrl/qcom,pmic-gpi [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sc7280-herobrine.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 16 #include <dt-bindings/input/gpio-keys.h> 17 #include <dt-bindings/input/input.h> 18 #include <dt-bindings/leds/common.h> 20 #include "sc7280-qcard.dtsi" 21 #include "sc7280-chrome-common.dtsi" 25 stdout-path = "serial0:115200n8"; 38 ppvar_sys: ppvar-sys-regulator { 39 compatible = "regulator-fixed"; 40 regulator-name = "ppvar_sys"; [all …]
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/freebsd/sys/contrib/dev/acpica/ |
H A D | changes.txt | 1 ---------------------------------------- 6 Fix 2 critical CVE addressing memory leaks - Seunghun Han 17 ---------------------------------------- 30 ---------------------------------------- 35 …that the PHAT firmware health record offset works correctly, fix various sub-table offsets, preven… 37 Fix the optional table 4-byte signature. Contributed by: Daniil Tatianin <99danilt@gmail.com> 56 ---------------------------------------- 71 Add new tables for various architectures/OS, mainly RISC-V and also update many more. 73 Add an option to either make the output deterministic or non-deterministic. 80 ---------------------------------------- [all …]
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