Searched +full:slew +full:- +full:percent (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#16 - 5P49V5923:17 0 -- OUT0_SEL_I2CB18 1 -- OUT119 2 -- OUT221 - 5P49V5933:22 0 -- OUT0_SEL_I2CB23 1 -- OUT1[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Renesas 9-series I2C PCIe clock generators10 The Renesas 9-series are I2C PCIe clock generators providing16 - 9FGV0241:17 0 -- DIF018 1 -- DIF119 - 9FGV0441:20 0 -- DIF0[all …]
1 // SPDX-License-Identifier: GPL-2.0-only50 struct vctrl_voltage_range *ctrl = &vctrl->vrange.ctrl; in vctrl_calc_ctrl_voltage()51 struct vctrl_voltage_range *out = &vctrl->vrange.out; in vctrl_calc_ctrl_voltage()53 return ctrl->min_uV + in vctrl_calc_ctrl_voltage()54 DIV_ROUND_CLOSEST_ULL((s64)(out_uV - out->min_uV) * in vctrl_calc_ctrl_voltage()55 (ctrl->max_uV - ctrl->min_uV), in vctrl_calc_ctrl_voltage()56 out->max_uV - out->min_uV); in vctrl_calc_ctrl_voltage()61 struct vctrl_voltage_range *ctrl = &vctrl->vrange.ctrl; in vctrl_calc_output_voltage()62 struct vctrl_voltage_range *out = &vctrl->vrange.out; in vctrl_calc_output_voltage()69 if (ctrl_uV < ctrl->min_uV) in vctrl_calc_output_voltage()[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later10 * - Use spread spectrum11 * - Use integer divider in FOD if applicable15 #include <linux/clk-provider.h>26 #include <dt-bindings/clock/versaclock.h>31 /* Factory-reserved register block */139 /* chip has built-in oscilator */206 /* Factory reserved regs, make them read-only */ in vc5_regmap_is_writeable()210 /* Factory reserved regs, make them read-only */ in vc5_regmap_is_writeable()236 ret = regmap_read(vc5->regmap, VC5_PRIM_SRC_SHDN, &src); in vc5_mux_get_parent()[all …]