| /linux/drivers/scsi/qla2xxx/ |
| H A D | qla_devtbl.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
[all …]
|
| /linux/drivers/video/fbdev/via/ |
| H A D | lcd.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
18 /* Resolution: 640x480, Channel: single, Dithering: Enable */
20 /* Resolution: 800x600, Channel: single, Dithering: Enable */
22 /* Resolution: 1024x768, Channel: single, Dithering: Enable */
24 /* Resolution: 1280x768, Channel: single, Dithering: Enable */
26 /* Resolution: 1280x1024, Channel: dual, Dithering: Enable */
28 /* Resolution: 1400x1050, Channel: dual, Dithering: Enable */
30 /* Resolution: 1600x1200, Channel: dual, Dithering: Enable */
[all …]
|
| H A D | dvi.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
20 /* Resolution: 640x480, Channel: single, Dithering: Enable */
22 /* Resolution: 800x600, Channel: single, Dithering: Enable */
24 /* Resolution: 1024x768, Channel: single, Dithering: Enable */
26 /* Resolution: 1280x768, Channel: single, Dithering: Enable */
28 /* Resolution: 1280x1024, Channel: dual, Dithering: Enable */
30 /* Resolution: 1400x1050, Channel: dual, Dithering: Enable */
32 /* Resolution: 1600x1200, Channel: dual, Dithering: Enable */
|
| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | ti,ads1119.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com>
13 The TI ADS1119 is a precision 16-bit ADC over I2C that offers single-ended and
28 reset-gpios:
31 avdd-supply: true
32 dvdd-supply: true
34 vref-supply:
38 "#address-cells":
[all …]
|
| H A D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
[all …]
|
| H A D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
[all …]
|
| /linux/include/linux/regulator/ |
| H A D | da9121.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
|
| /linux/Documentation/driver-api/ |
| H A D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
32 A physical connector on the motherboard that accepts a single memory
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
45 same branch can be used in single mode or in lockstep mode. When
50 of correcting more errors than on single mode.
52 * Single-channel
[all …]
|
| /linux/Documentation/fb/ |
| H A D | viafb.rst | 6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
[all …]
|
| /linux/Documentation/hwmon/ |
| H A D | pcf8591.rst | 17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
33 Pins AIN0 to AIN3 are single ended inputs for channels 0 to 3
35 - mode 1 : three differential inputs
39 - mode 2 : single ended and differential mixed
[all …]
|
| /linux/include/linux/iio/frequency/ |
| H A D | ad9523.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * struct ad9523_channel_spec - Output channel configuration
40 * @channel_num: Output channel number.
42 * @sync_ignore_en: Ignore chip-level SYNC signal.
44 * @use_alt_clock_src: Channel divider uses alternative clk source.
45 * @output_dis: Disables, powers down the entire channel.
49 * @channel_divider: 10-bit channel divider.
50 * @extended_name: Optional descriptive channel name.
106 * struct ad9523_platform_data - platform specific information
109 * @refa_diff_rcv_en: REFA differential/single-ended input selection.
[all …]
|
| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | dlg,da9121.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adam Ward <Adam.Ward.opensource@diasemi.com>
13 Dialog Semiconductor DA9121 Single-channel 10A double-phase buck converter
14 Dialog Semiconductor DA9122 Double-channel 5A single-phase buck converter
15 Dialog Semiconductor DA9220 Double-channel 3A single-phase buck converter
16 Dialog Semiconductor DA9217 Single-channel 6A double-phase buck converter
17 Dialog Semiconductor DA9130 Single-channel 10A double-phase buck converter
18 Dialog Semiconductor DA9131 Double-channel 5A single-phase buck converter
[all …]
|
| /linux/include/sound/sof/ |
| H A D | channel_map.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
16 * \brief Channel map, specifies transformation of one-to-many or many-to-one.
18 * In case of one-to-many specifies how the output channels are computed out of
19 * a single source channel,
20 * in case of many-to-one specifies how a single target channel is computed
23 * Channel index specifies position of the channel in the stream on the 'one'
29 * Channel mask describes which channels are taken into account on the "many"
30 * side. Bit[i] set to 1 means that i-th channel is used for computation
33 * Channel mask is followed by array of coefficients in Q2.30 format,
34 * one per each channel set in the mask (left to right, LS bit set in the
[all …]
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-coresight-devices-cti | 1 What: /sys/bus/coresight/devices/<cti-name>/enable
7 What: /sys/bus/coresight/devices/<cti-name>/powered
13 What: /sys/bus/coresight/devices/<cti-name>/ctmid
19 What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons
25 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name
31 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals
37 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_types
44 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_signals
50 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_types
57 What: /sys/bus/coresight/devices/<cti-name>/regs/inout_sel
[all …]
|
| /linux/Documentation/devicetree/bindings/iio/proximity/ |
| H A D | tyhx,hx9023s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yasin Lee <yasin.lee.x@gmail.com>
29 vdd-supply: true
31 "#address-cells":
34 "#size-cells":
38 "^channel@[0-4]$":
47 description: The channel number.
50 - compatible
[all …]
|
| /linux/drivers/regulator/ |
| H A D | da9121-regulator.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
23 #include <dt-bindings/regulator/dlg,da9121-regulator.h>
|
| /linux/drivers/hwmon/ |
| H A D | pcf8591.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2001-2004 Aurelien Jarno <aurelien@aurel32.net>
25 " 0 = four single ended inputs\n"
27 " 2 = single ended and differential mixed\n"
41 * 0x00 = four single ended inputs
43 * 0x20 = single ended and differential mixed
52 * Channel selection
53 * 0x00 = channel 0
54 * 0x01 = channel 1
55 * 0x02 = channel 2
[all …]
|
| /linux/include/linux/amba/ |
| H A D | pl08x.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver
6 * Copyright (C) 2010 ST-Ericsson SA
32 * struct pl08x_channel_data - data structure to pass info between
33 * platform and PL08x driver regarding channel configuration
34 * @bus_id: name of this device channel, not just a device name since
35 * devices may have more than one channel e.g. "foo_tx"
37 * channel (for platforms supporting muxed signals). If you have
41 * disabling simultaneous use of the same channel for two devices.
43 * the channel. Set to the same as min_signal for
[all …]
|
| /linux/Documentation/mhi/ |
| H A D | mhi.rst | 1 .. SPDX-License-Identifier: GPL-2.0
26 ----
37 Channel Doorbell array: Channel Doorbell (DB) registers used by the host to
48 ---------------
55 Channel context array: All channel configurations are organized in channel
58 Transfer rings: Used by the host to schedule work items for a channel. The
74 --------
82 bidirectional data pipe, which can be used by the upper-layer protocols to
84 diagnostics messages, and so on). Each channel is associated with a single
88 --------------
[all …]
|
| /linux/drivers/net/wireless/ath/ath9k/ |
| H A D | ar9002_phy.c | 2 * Copyright (c) 2008-2011 Atheros Communications Inc.
20 * AR5416 MAC based PCI devices and AR518 MAC based PCI-Express
21 * devices have either an external AR2133 analog front end radio for single
27 * into a single-chip and require less programming.
29 * The following single-chips exist with a respective embedded radio:
31 * AR9280 - 11n dual-band 2x2 MIMO for PCIe
32 * AR9281 - 11n single-band 1x2 MIMO for PCIe
33 * AR9285 - 11n single-band 1x1 for PCIe
34 * AR9287 - 11n single-band 2x2 MIMO for PCIe
36 * AR9220 - 11n dual-band 2x2 MIMO for PCI
[all …]
|
| /linux/drivers/scsi/ |
| H A D | scsi_proc.c | 1 // SPDX-License-Identifier: GPL-2.0
10 * (c) 1995 Michael Neuffer neuffer@goofy.zdv.uni-mainz.de
14 * Andreas Heilwagen <crashcar@informatik.uni-koblenz.de>
51 * struct scsi_proc_entry - (host template, SCSI proc dir) association
68 ssize_t ret = -ENOMEM; in proc_scsi_host_write()
72 return -EOVERFLOW; in proc_scsi_host_write()
74 if (!shost->hostt->write_info) in proc_scsi_host_write()
75 return -EINVAL; in proc_scsi_host_write()
79 ret = -EFAULT; in proc_scsi_host_write()
82 ret = shost->hostt->write_info(shost, page, count); in proc_scsi_host_write()
[all …]
|
| /linux/drivers/gpu/drm/vmwgfx/ |
| H A D | vmwgfx_msg.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
98 * @channel: RPC channel
103 static int vmw_open_channel(struct rpc_channel *channel, unsigned int protocol) in vmw_open_channel() argument
112 return -EINVAL; in vmw_open_channel()
114 channel->channel_id = HIGH_WORD(edx); in vmw_open_channel()
115 channel->cookie_high = esi; in vmw_open_channel()
116 channel->cookie_low = edi; in vmw_open_channel()
126 * @channel: RPC channel
130 static int vmw_close_channel(struct rpc_channel *channel) in vmw_close_channel() argument
[all …]
|
| /linux/Documentation/driver-api/dmaengine/ |
| H A D | provider.rst | 20 DMA-eligible devices to the controller itself. Whenever the device
24 A very simple DMA controller would only take into account a single
30 require a specific number of bits to be transferred in a single
42 using a parameter called the burst size, that defines how many single
44 transfer into smaller sub-transfers.
47 that involve a single contiguous block of data. However, some of the
49 non-contiguous buffers to a contiguous buffer, which is called
50 scatter-gather.
53 scatter-gather. So we're left with two cases here: either we have a
56 that implements in hardware scatter-gather.
[all …]
|
| /linux/drivers/net/wan/ |
| H A D | hd64570.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* SCA HD64570 register definitions - all addresses for mode 0 (8086 MPU)
42 /* MSCI channel (port) 0 registers - offset 0x20
43 MSCI channel (port) 1 registers - offset 0x40 */
77 /* Timer channel 0 (port 0 RX) registers - offset 0x60
78 Timer channel 1 (port 0 TX) registers - offset 0x68
79 Timer channel 2 (port 1 RX) registers - offset 0x70
80 Timer channel 3 (port 1 TX) registers - offset 0x78
88 #define TCNTL 0x00 /* Up-counter L */
89 #define TCNTH 0x01 /* Up-counter H */
[all …]
|
| /linux/arch/parisc/include/asm/ |
| H A D | dma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * High DMA channel support & info by Hannu Savolainen
20 ** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
34 ** We don't have DMA channels... well V-class does but the
36 ** Note: this is not relevant right now for PA-RISC, but we cannot
38 ** won't compile :-(
41 #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
42 #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
43 #define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
55 #define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
[all …]
|